Patents by Inventor Rohit Kilaru

Rohit Kilaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180240967
    Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 23, 2018
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, CROCUS TECHNOLOGY
    Inventors: Michael C. Gaidis, Erwan Gapihan, Rohit Kilaru, Eugene J. O'Sullivan
  • Patent number: 10003014
    Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: June 19, 2018
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, CROCUS TECHNOLOGY
    Inventors: Michael C. Gaidis, Erwan Gapihan, Rohit Kilaru, Eugene J. O'Sullivan
  • Patent number: 9728717
    Abstract: A method of magnetic tunnel junction patterning for magnetoresistive random access memory devices using low atomic weight ion sputtering. The method includes: providing a magnetoresistive random access memory device including a hard mask metal, a MTJ element, and a semiconductor substrate, wherein the hard mask metal is disposed on the MTJ element and, wherein the MTJ element is disposed on the semiconductor substrate; and etching back the MTJ element into a plurality of MTJ element pillars using a low atomic weight ion sputtering. A magnetoresistive random access memory device using low atomic weight ion sputtering. The device includes: a semiconductor substrate; a plurality of MTJ element pillars disposed on the semiconductor substrate, wherein the plurality of MTJ element pillars is etched from a MTJ element using a low atomic weight ion sputtering; and a hard mask metal disposed on the MTJ element pillars.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: August 8, 2017
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Rohit Kilaru, Nathan P. Marchack, Hiroyuki Miyazoe
  • Patent number: 9553257
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a free layer and a reference layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Bottom contacts are separated from one another by a column space while the plurality of bottom contacts are self-aligned to the linear magnetic tunnel junction structure, such that the plurality of bottom contacts are in the line with and underneath the linear magnetic tunnel junction structure. The bottom contacts abut a bottom of the linear magnetic tunnel junction structure. MRAM devices are formed by having non-conducting parts of the free layer isolating individual interfaces between the bottom contacts and the free layer. The MRAM devices are formed in the line of the linear magnetic tunnel junction structure.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: January 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Michael C. Gaidis, Rohit Kilaru
  • Patent number: 9553128
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a free layer and a reference layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Bottom contacts are separated from one another by a column space while the plurality of bottom contacts are self-aligned to the linear magnetic tunnel junction structure, such that the plurality of bottom contacts are in the line with and underneath the linear magnetic tunnel junction structure. The bottom contacts abut a bottom of the linear magnetic tunnel junction structure. MRAM devices are formed by having non-conducting parts of the free layer isolating individual interfaces between the bottom contacts and the free layer. The MRAM devices are formed in the line of the linear magnetic tunnel junction structure.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: January 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Michael C. Gaidis, Rohit Kilaru
  • Publication number: 20170005260
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a free layer and a reference layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Bottom contacts are separated from one another by a column space while the plurality of bottom contacts are self-aligned to the linear magnetic tunnel junction structure, such that the plurality of bottom contacts are in the line with and underneath the linear magnetic tunnel junction structure. The bottom contacts abut a bottom of the linear magnetic tunnel junction structure. MRAM devices are formed by having non-conducting parts of the free layer isolating individual interfaces between the bottom contacts and the free layer. The MRAM devices are formed in the line of the linear magnetic tunnel junction structure.
    Type: Application
    Filed: November 23, 2015
    Publication date: January 5, 2017
    Inventors: Anthony J. Annunziata, Michael C. Gaidis, Rohit Kilaru
  • Publication number: 20170005135
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a free layer and a reference layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Bottom contacts are separated from one another by a column space while the plurality of bottom contacts are self-aligned to the linear magnetic tunnel junction structure, such that the plurality of bottom contacts are in the line with and underneath the linear magnetic tunnel junction structure. The bottom contacts abut a bottom of the linear magnetic tunnel junction structure. MRAM devices are formed by having non-conducting parts of the free layer isolating individual interfaces between the bottom contacts and the free layer. The MRAM devices are formed in the line of the linear magnetic tunnel junction structure.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Anthony J. Annunziata, Michael C. Gaidis, Rohit Kilaru
  • Patent number: 9537086
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a reference layer and a free layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Magnetoresistive random access memory (MRAM) devices are formed of the reference layer, the non-magnetic tunnel barrier, and the free layer, each of the MRAM devices are in the line. Self-aligned contacts are formed on top of the linear magnetic tunnel junction structure, and the self-aligned contacts individually define the MRAM devices. The self-aligned contacts are separated from one another in the line. Bottom conductive vias are underneath the linear magnetic tunnel junction structure. The bottom conductive vias abut the reference layer of the linear magnetic tunnel junction structure.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Rohit Kilaru
  • Patent number: 9536925
    Abstract: A technique relates to an MRAM system. A conformal film covers trenches formed in an upper material. The upper material covers conductive islands in a substrate. The conformal film is selectively etched to leave sidewalls on the trenches. The sidewalls are etched into vertical columns self-aligned to and directly on top of the conductive islands below. A filling material is deposited and planarized to leave exposed tops of the vertical columns. An MTJ element is formed on top of the filling material and exposed tops of the vertical columns. The MTJ element is patterned into lines corresponding to the vertical columns, and each of the lines has a line MTJ element self-aligned to one of the vertical columns. Line MRAM devices are formed by patterning the MTJ element into the lines. Each of line MRAM devices respectively include the line MTJ element self-aligned to the one of the vertical columns.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: January 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Joel D. Chudow, Michael C. Gaidis, Rohit Kilaru
  • Publication number: 20160380027
    Abstract: A technique relates to an MRAM system. A conformal film covers trenches formed in an upper material. The upper material covers conductive islands in a substrate. The conformal film is selectively etched to leave sidewalls on the trenches. The sidewalls are etched into vertical columns self-aligned to and directly on top of the conductive islands below. A filling material is deposited and planarized to leave exposed tops of the vertical columns. An MTJ element is formed on top of the filling material and exposed tops of the vertical columns. The MTJ element is patterned into lines corresponding to the vertical columns, and each of the lines has a line MTJ element self-aligned to one of the vertical columns. Line MRAM devices are formed by patterning the MTJ element into the lines. Each of line MRAM devices respectively include the line MTJ element self-aligned to the one of the vertical columns.
    Type: Application
    Filed: October 22, 2015
    Publication date: December 29, 2016
    Inventors: Anthony J. Annunziata, Joel D. Chudow, Michael C. Gaidis, Rohit Kilaru
  • Patent number: 9525125
    Abstract: A technique relates to a linear magnetoresistive random access memory (MRAM) device. A linear magnetic tunnel junction structure includes a non-magnetic tunnel barrier on top of a reference layer and a free layer on top of the non-magnetic tunnel barrier, where the linear magnetic tunnel junction structure is in a line. Magnetoresistive random access memory (MRAM) devices are formed of the reference layer, the non-magnetic tunnel barrier, and the free layer, each of the MRAM devices are in the line. Self-aligned contacts are formed on top of the linear magnetic tunnel junction structure, and the self-aligned contacts individually define the MRAM devices. The self-aligned contacts are separated from one another in the line. Bottom conductive vias are underneath the linear magnetic tunnel junction structure. The bottom conductive vias abut the reference layer of the linear magnetic tunnel junction structure.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: December 20, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Rohit Kilaru
  • Publication number: 20160276579
    Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Inventors: Michael C. Gaidis, Erwan Gapihan, Rohit Kilaru, Eugene J. O'Sullivan
  • Publication number: 20160260889
    Abstract: A method of magnetic tunnel junction patterning for magnetoresisitive random access memory devices using low atomic weight ion sputtering. The method includes: providing a magnetoresistive random access memory device including a hard mask metal, a MTJ element, and a semiconductor substrate, wherein the hard mask metal is disposed on the MTJ element and, wherein the MTJ element is disposed on the semiconductor substrate; and etching back the MTJ element into a plurality of MTJ element pillars using a low atomic weight ion sputtering. A magnetoresistive random access memory device using low atomic weight ion sputtering. The device includes: a semiconductor substrate; a plurality of MTJ element pillars disposed on the semiconductor substrate, wherein the plurality of MTJ element pillars is etched from a MTJ element using a low atomic weight ion sputtering; and a hard mask metal disposed on the MTJ element pillars.
    Type: Application
    Filed: March 3, 2015
    Publication date: September 8, 2016
    Inventors: Anthony J. Annunziata, Rohit Kilaru, Nathan P. Marchack, Hiroyuki Miyazoe
  • Publication number: 20160260893
    Abstract: A method of magnetic tunnel junction patterning for magnetoresisitive random access memory devices using low atomic weight ion sputtering. The method includes: providing a magnetoresistive random access memory device including a hard mask metal, a MTJ element, and a semiconductor substrate, wherein the hard mask metal is disposed on the MTJ element and, wherein the MTJ element is disposed on the semiconductor substrate; and etching back the MTJ element into a plurality of MTJ element pillars using a low atomic weight ion sputtering. A magnetoresistive random access memory device using low atomic weight ion sputtering. The device includes: a semiconductor substrate; a plurality of MTJ element pillars disposed on the semiconductor substrate, wherein the plurality of MTJ element pillars is etched from a MTJ element using a low atomic weight ion sputtering; and a hard mask metal disposed on the MTJ element pillars.
    Type: Application
    Filed: June 17, 2015
    Publication date: September 8, 2016
    Inventors: Anthony J. Annunziata, Rohit Kilaru, Nathan P. Marchack, Hiroyuki Miyazoe
  • Patent number: 9299924
    Abstract: A technique relates to an MRAM system. A conformal film covers trenches formed in an upper material. The upper material covers conductive islands in a substrate. The conformal film is selectively etched to leave sidewalls on the trenches. The sidewalls are etched into vertical columns self-aligned to and directly on top of the conductive islands below. A filling material is deposited and planarized to leave exposed tops of the vertical columns. An MTJ element is formed on top of the filling material and exposed tops of the vertical columns. The MTJ element is patterned into lines corresponding to the vertical columns, and each of the lines has a line MTJ element self-aligned to one of the vertical columns. Line MRAM devices are formed by patterning the MTJ element into the lines. Each of line MRAM devices respectively include the line MTJ element self-aligned to the one of the vertical columns.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: March 29, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Joel D. Chudow, Michael C. Gaidis, Rohit Kilaru
  • Publication number: 20150372225
    Abstract: A method of forming a memory device that in one embodiment may include forming a magnetic tunnel junction on a first electrode using an electrically conductive mask and subtractive etch method. Following formation of the magnetic tunnel junction, at least one dielectric layer is deposited to encapsulate the magnetic tunnel junction. Ion beam etching/Ion beam milling may then remove the portion of the at least one dielectric layer that is present on the electrically conductive mask, wherein a remaining portion of the at least one dielectric layer is present over the first electrode. A second electrode may then be formed in contact with the electrically conductive mask.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Michael C. Gaidis, Erwan Gapihan, Rohit Kilaru, Eugene J. O'Sullivan