Patents by Inventor Rohit Mittal

Rohit Mittal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8548098
    Abstract: A circuit for recovering data from an incoming data stream according to one embodiment includes a capacitor and a substantially constant current source for charging the capacitor. A subcircuit generates a signal causing the capacitor to discharge upon detecting a first type of transition in the incoming data stream, the capacitor re-charging upon being at least partially discharged. A comparator compares a voltage on a node coupled to the capacitor to a reference voltage, the comparator outputting a first signal if the voltage on the node is higher than the reference voltage and outputting a second signal if the voltage on the node is lower than the reference voltage, the first signal being associated with a first logic value, the second signal being associated with a second logic value.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: October 1, 2013
    Assignee: Intelleflex Corporation
    Inventors: Jyn-Bang Shyu, Robert Olah, Rohit Mittal
  • Patent number: 8169387
    Abstract: An LED driver includes an embedded non-volatile memory (NVM) capable of being programmed and storing control data for setting a variety of features of the LED driver, such as the maximum current for driving the LEDs, analog parameters such as the resistance of the internal resistor for setting the reference current for the LEDs, and the operation modes of the charge pump of the LED driver. This enables implementation of multiple LED driver product options without the need for different metallization steps during the fabrication process for the LED driver.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: May 1, 2012
    Assignee: IXYS Corporation
    Inventors: Rohit Mittal, Donato Montanari
  • Publication number: 20090073096
    Abstract: An LED driver includes an embedded non-volatile memory (NVM) capable of being programmed and storing control data for setting a variety of features of the LED driver, such as the maximum current for driving the LEDs, analog parameters such as the resistance of the internal resistor for setting the reference current for the LEDs, and the operation modes of the charge pump of the LED driver. This enables implementation of multiple LED driver product options without the need for different metallization steps during the fabrication process for the LED driver.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 19, 2009
    Applicant: LEADIS TECHNOLOGY, INC.
    Inventors: Rohit Mittal, Donato Montanari
  • Publication number: 20080263003
    Abstract: In one embodiment, a method for increasing query traffic to a web site includes providing initial information pertaining to an initial object for presentation to a user, and providing connection information identifying a logical connection between the initial object and one or more additional objects for presentation to the user. The connection information contains data prompting the user to submit a new query concerning one of the additional objects. The method may further include receiving the new query concerning one of the additional objects, and providing a result of the new query to the user.
    Type: Application
    Filed: December 22, 2005
    Publication date: October 23, 2008
    Inventors: Tomasz Imielinski, Rohit Mittal, Scot Gregory Zola
  • Publication number: 20080068066
    Abstract: A circuit device for a high efficiency current driver for a white LED is presented. The circuit device includes a bias transistor to provide a substantially constant bias current through a bias leg. A driver transistor is connected to the bias transistor and the current in the driver transistor substantially matches the bias current. A current feedback amplifier is configured in series with the driver transistor and a feedback node has a feedback voltage representative of an output voltage. A mirroring transistor connected to the feedback node mirrors the output voltage to the bias transistor thereby allowing the output current to substantially match the bias current when an applied voltage across the driver transistor is below a saturation voltage of the driver transistor thus mitigating effects of headroom limitation in the driver transistor.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 20, 2008
    Inventor: Rohit Mittal
  • Publication number: 20070139159
    Abstract: A circuit according to one embodiment of the present invention includes a first frequency to voltage converter for storing a reference voltage based on a frequency of an incoming signal, and a second frequency to voltage converter for storing a second voltage based on the frequency of the incoming signal, the second voltage being a fraction of the reference voltage. A voltage to frequency converter creates a voltage on a node, the voltage repeatedly varying between about the reference voltage and about the second voltage. From this varying signal, a clock signal can be derived.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: Rohit Mittal, Robert Olah, Jyn-Bang Shyu
  • Publication number: 20070141983
    Abstract: A circuit for recovering data from an incoming data stream according to one embodiment includes a capacitor and a substantially constant current source for charging the capacitor. A subcircuit generates a signal causing the capacitor to discharge upon detecting a first type of transition in the incoming data stream, the capacitor re-charging upon being at least partially discharged. A comparator compares a voltage on a node coupled to the capacitor to a reference voltage, the comparator outputting a first signal if the voltage on the node is higher than the reference voltage and outputting a second signal if the voltage on the node is lower than the reference voltage, the first signal being associated with a first logic value, the second signal being associated with a second logic value.
    Type: Application
    Filed: December 15, 2005
    Publication date: June 21, 2007
    Inventors: Jyn-Bang Shyu, Robert Olah, Rohit Mittal
  • Publication number: 20070078842
    Abstract: The invention provides a system and method for providing an output in response to a user reference query. A user reference query is received and an answer to the user reference query is determined. A unique entity identifier (EID) for the answer is determined and used to query a reference system to determine one or more reference elements, e.g. a reference summary, a picture, or a video, for example. The one or more reference elements and a text of the answer are provided to an output provider. The output provider combines the one or more reference elements and the answer text into a single output. In one exemplary configuration, the single output is a graphical user interface transmitted as an extensible markup language (XML) file, which integrates the answer text and the one or more reference elements.
    Type: Application
    Filed: December 21, 2005
    Publication date: April 5, 2007
    Inventors: Scot Zola, Eric Glover, Rohit Mittal, Apostolos Gerasoulis, Stephen Orr, Gary Chevsky
  • Publication number: 20070022109
    Abstract: Systems and methods for answering user questions using databases annotated with answerable questions are disclosed. The database includes database items organized into columns. Each of the columns may have a question annotated thereto. The question is a parameterized question that is answerable by the database items in the column. A question answering algorithm is used to search the database for an annotated question corresponding to a question that needs to be answered.
    Type: Application
    Filed: May 16, 2006
    Publication date: January 25, 2007
    Inventors: Tomasz Imielinski, Rohit Mittal, Scot Zola, Jay Goyal
  • Patent number: 6952529
    Abstract: An apparatus and method for measuring optical signal to noise ratio (OSNR) in a node of an optical data network is disclosed. A peak power level and an average power level are measured for an optical input to an optical detector. The OSNR is determined by selecting an OSNR having the peak power level and the average power level associated with an optical signal traversing an optical path having attenuation and optical amplifier noise.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: October 4, 2005
    Assignee: Ciena Corporation
    Inventor: Rohit Mittal
  • Patent number: 6915076
    Abstract: An apparatus and method for detecting a signal in an optical data network is disclosed. A peak power level and an average power level are measured for an optical input to an optical detector. A threshold power level is associated with each average power level that is sufficient to distinguish a data signal form optical noise at the average power level. A signal is detected if the measured peak power level exceeds the threshold power level appropriate for the average power level. In one embodiment, a threshold value of a ratio of the peak power level to the average power level is calculated and a signal is detected if the ratio of the measured peak power level to the average power exceeds the threshold value.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: July 5, 2005
    Assignee: CIENA Corporation
    Inventors: Rohit Mittal, Chris Kennedy
  • Patent number: 5777514
    Abstract: An operational amplifier having an input and an output stage. The input stage includes first and second source-coupled NMOS input transistors for accepting a differential input voltage and first and second PMOS load transistors for supplying current to each input transistor. A node between the first input transistor and first load transistor is coupled to a gate of a third PMOS transistor having its source coupled to a positive supply and its drain coupled to the sources of the input transistors and to a negative supply through a first biasing transistor. The output stage includes a fourth PMOS transistor having its gate coupled to a node between the second input transistor and the second load transistor and a source coupled to the positive supply voltage. A drain of the output transistor forms an output node and is coupled to the negative supply through a second biasing transistor.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: July 7, 1998
    Assignee: Micro Linear Corporation
    Inventors: Rohit Mittal, Carlos Alberto Laber