Patents by Inventor Rohit Reddy

Rohit Reddy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12080090
    Abstract: A computing system obtains a document that includes text. The computing system identifies a fact referenced in the text of the document, where the fact includes a fact name and a fact value. The computing system determines a topic of the document based upon the text of the document. The computing system identifies a factoid stored in a data store based upon the topic and the fact name, where the factoid includes the fact name and a second fact value, and further where the factoid has been generated based upon second text of a second document. While the document is being displayed to a user, the computing system causes a message to be displayed to the user, where the message prompts the user to accept or reject replacement of the fact value in the document with the second fact value.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: September 3, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Jatin Kakkar, Beethika Tripathi, Rashi Anand, Pankaj Khanzode, Neha Singh, Daraksha Parveen, Gangula Rama Rohit Reddy, Rishabh Malhotra
  • Publication number: 20210399121
    Abstract: Derivative cancellation techniques have been used to linearize transistors using multiple discreet devices. However at frequencies approaching and in the mm-wave regime the use of individual devices no longer works due to the parasitics associated with combining the devices. In this invention device structures are described which apply the derivative cancellation technique in a single device thus removing the detrimental impact of combining. In one example, an N-polar transistor structure includes a channel; a cap structure comprising a plurality of cap layers on or above the channel; a source contact and a drain contact to the channel; and a castellated, stepped, or varying pattern formed in the cap layers so that gate metal deposited on the pattern forms at least two different threshold voltages and current combines in the ohmic region with essentially zero parasitic inductance.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 23, 2021
    Applicant: The Regents of the University of California
    Inventors: Brian Romanczyk, Umesh K. Mishra, Pawana Shrestha, Matthew Guidry, James Buckwalter, Stacia Keller, Rohit Reddy Karnaty
  • Patent number: 9385587
    Abstract: A controlled start-up circuit mechanism in a linear voltage regulator can handle a higher supply voltage at start-up and limits the voltage seen at the devices to be lower than the maximum allowed operation voltage. The circuit may regulate voltage for operating a device coupled to a host when the host supply exceeds that necessary for device operation. The controlled start-up mechanism handles a sudden ramp up or spike of supply voltage relative to the device's operational voltage.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: July 5, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Deepak Pancholi, Bhavin Odedara, Rohit Reddy
  • Publication number: 20140266089
    Abstract: A controlled start-up circuit mechanism in a linear voltage regulator can handle a higher supply voltage at start-up and limits the voltage seen at the devices to be lower than the maximum allowed operation voltage. The circuit may regulate voltage for operating a device coupled to a host when the host supply exceeds that necessary for device operation. The controlled start-up mechanism handles a sudden ramp up or spike of supply voltage relative to the device's operational voltage.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 18, 2014
    Inventors: Deepak Pancholi, Bhavin Odedara, Rohit Reddy