Abstract: A read only memory (ROM) with redundancy and methods of use are provided. The ROM with redundancy includes a programmable array coupled to a repair circuit having one or more redundant repairs. The one or more redundant repairs include a word address match logic block, a data I/O address, and a tri-state buffer. The word address match logic block is provided to the tri-state buffer as a control input and the data I/O address is provided to the tri-state buffer as an input. An output of the tri-state buffer of each redundant repair is provided as a first input to one or more logic devices. One or more data outputs of a ROM bit cell array is provided as a second input to a respective one of the one or more logic devices.

Abstract: Aspects of the invention provide for a structure and method for determining a degree of process variation skew between a plurality of bit cells in a static random-access-memory (SRAM) column architecture. In one embodiment, a structure includes: a plurality of bit cells within a static random access memory (SRAM) column architecture; a digital-to-analog converter (DAC) connected to the bit cells through a pair of multiplexers; and a pre-charge circuit connected to the bit cells through the pair of multiplexers, wherein the DAC and the pre-charge circuit control and test the bit cells to determine a degree of process variation skew between each of the bit cells.

Abstract: An embodiment for evaluating rules pertaining to an event includes providing a rule trie comprising multiple nodes, wherein match conditions must be met to trigger a given rule, and each match condition corresponds to a different node. An attribute trie is provided for a string attribute, which includes a node sequence having a value. The string attribute is extracted from the event and also has a value. The value of the extracted string attribute and the value of the node sequence are compared, by traversing a path extending along the node sequence. Responsive to determining that the values of the extracted string attribute and the node sequence are the same, notice is provided that the match condition of a particular node of the rule trie has been met by an attribute of the received event.

Abstract: A method and system for tracking documents in computing devices is provided. The method includes creating a unique identifier for a document in a computing device based on contents of the document and meta-data associated with the document. The unique identifier is then used for tracking the document in one or more computing devices. The tracking of the document can be done for all the documents in plurality of computing devices. The method further tracks propagation of the document in the plurality computing devices.

Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device for eliminating current leakage, and a related method. In one embodiment, an ESD protection device includes: a resistor-capacitor (RC) circuit for receiving a power supply voltage; an ESD clamp including a plurality of n-type field-effect transistors (nFETs) for protecting the IC during an ESD event; a trigger circuit for receiving an output of the RC circuit and generating a trigger pulse to turn on the ESD clamp during the ESD event; and an nFET bias selection circuit connected to the trigger circuit, the nFET bias selection circuit for selecting one of: a low voltage supply or a negative bias voltage supply for the trigger circuit, such that the trigger circuit generates a trigger pulse, in response to selecting the negative bias voltage supply, to turn off the ESD clamp during normal operation.

Abstract: An embodiment of the invention pertains to a method that includes an operating system, program components running on the operating system, and a file system associated with one or more files. Responsive to a write request sent from a specified program component to the operating system, in order to write specified data content to a given file, the method determines whether the write request meets a criterion, which is derived from the identity of at least one of the specified program component, and the given file. If the criterion is met, a message is immediately sent to release the specified program component from a wait state. Data portions of the specified data content are then selectively written to a storage buffer, and subsequently written from the buffer to the given file.

Abstract: An embodiment of the invention pertains to a method that includes an operating system, program components running on the operating system, and a file system associated with one or more files. Responsive to a write request sent from a specified program component to the operating system, in order to write specified data content to a given file, the method determines whether the write request meets a criterion, which is derived from the identity of at least one of the specified program component, and the given file. If the criterion is met, a message is immediately sent to release the specified program component from a wait state. Data portions of the specified data content are then selectively written to a storage buffer, and subsequently written from the buffer to the given file.

Abstract: An embodiment for evaluating rules pertaining to an event includes providing a rule trie comprising multiple nodes, wherein match conditions must be met to trigger a given rule, and each match condition corresponds to a different node. An attribute trie is provided for a string attribute, which includes a node sequence having a value. The string attribute is extracted from the event and also has a value. The value of the extracted string attribute and the value of the node sequence are compared, by traversing a path extending along the node sequence. Responsive to determining that the values of the extracted string attribute and the node sequence are the same, notice is provided that the match condition of a particular node of the rule trie has been met by an attribute of the received event.

Abstract: An embodiment for evaluating rules pertaining to an event includes providing a rule trie comprising multiple nodes, wherein match conditions must be met to trigger a given rule, and each match condition corresponds to a different node. An attribute trie is provided for a string attribute, which includes a node sequence having a value. The string attribute is extracted from the event and also has a value. The value of the extracted string attribute and the value of the node sequence are compared, by traversing a path extending along the node sequence. Responsive to determining that the values of the extracted string attribute and the node sequence are the same, notice is provided that the match condition of a particular node of the rule trie has been met by an attribute of the received event.

Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device for eliminating current leakage, and a related method. In one embodiment, an ESD protection device includes: a resistor-capacitor (RC) circuit for receiving a power supply voltage; an ESD clamp including a plurality of n-type field-effect transistors (nFETs) for protecting the IC during an ESD event; a trigger circuit for receiving an output of the RC circuit and generating a trigger pulse to turn on the ESD clamp during the ESD event; and an nFET bias selection circuit connected to the trigger circuit, the nFET bias selection circuit for selecting one of: a low voltage supply or a negative bias voltage supply for the trigger circuit, such that the trigger circuit generates a trigger pulse, in response to selecting the negative bias voltage supply, to turn off the ESD clamp during normal operation.

Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device with reduced current leakage, and a related method. In one embodiment, an ESD protection device for an integrated circuit (IC) is provided. The ESD protection device includes: a resistor-capacitor (RC) timing circuit for selectively turning on the ESD protection device during an ESD event; a trigger circuit for receiving an output of the RC timing circuit and generating a trigger pulse for driving at least one of: a first ESD clamp and a second ESD clamp; and a selection circuit for selecting one of: the trigger circuit or a charge pump for controlling the second ESD clamp.

Abstract: A method and system for transport data compression between a server and a client based on patches to the dictionaries used for encoding the data. The method includes requesting the server for data, returning the data and a dictionary patch to the client where data having been compressed based on a previously used dictionary and the dictionary patch, and decompressing the returned data using the dictionary and the dictionary patch. The dictionary patch includes updates to the previously used dictionary. Each dictionary has a dictionary identifier that the server and client use to identify the dictionary in their requests and responses. The identifier might be a unique identification or a network session number. Upon receiving a response, the client updates the previously used dictionary with information in the patch and decompresses the returned data using the updated dictionary.

Abstract: A read only memory (ROM) with redundancy and methods of use are provided. The ROM with redundancy includes a programmable array coupled to a repair circuit having one or more redundant repairs. The one or more redundant repairs include a word address match logic block, a data I/O address, and a tri-state buffer. The word address match logic block is provided to the tri-state buffer as a control input and the data I/O address is provided to the tri-state buffer as an input. An output of the tri-state buffer of each redundant repair is provided as a first input to one or more logic devices. One or more data outputs of a ROM bit cell array is provided as a second input to a respective one of the one or more logic devices.

Abstract: A hybrid IO cell for use with controlled collapse chip connection, wirebond core limited, wirebond IO limited, and wirebond inline chip designs is provided. A method of designing the hybrid IO cell includes designating a technology, determining a minimum pad width of the technology, and determining a minimum pad spacing of the technology. The method also includes determining a width of the hybrid IO cell based on the minimum pad width and the minimum pad spacing, setting a length of the hybrid IO cell equal to the determined width, and storing a definition of the IO cell in a library stored on a computer useable storage medium.

Abstract: Structures and methods for implementing alternating power gating in integrated circuits. A semiconductor structure includes a power gated circuit including a group of power gate switches and an alternating enable generator that generates enabling signals. Each respective one of the power gate switches is enabled by a respective one of the enabling signals. The alternating generator generates the enabling signals such that a first enabled power gate switch is alternated amongst the group of power gate switches.

Abstract: Aspects of the invention provide an electrostatic discharge (ESD) protection device with reduced current leakage, and a related method. In one embodiment, an ESD protection device for an integrated circuit (IC) is provided. The ESD protection device includes: a resistor-capacitor (RC) timing circuit for selectively turning on the ESD protection device during an ESD event; a trigger circuit for receiving an output of the RC timing circuit and generating a trigger pulse for driving at least one of: a first ESD clamp and a second ESD clamp; and a selection circuit for selecting one of: the trigger circuit or a charge pump for controlling the second ESD clamp.

Abstract: A semiconductor device structure is embedded within a semiconductor chip that calibrates a photon-emission luminosity scale by running multiple known currents through the device. The method comprises embedding at least one photon emission device in an integrated circuit having at least one functional device. A control current is applied to the at least one photon emission device. The photon emission intensity produced by the at least one photon emission device is captured. The current density of the at least one photon emission device is calculated. A test current is applied to the at least one functional device. The photon emission intensity produced by the at least one functional device is captured. The current density of the at least one functional device is estimated based on a comparison with the calculated current density of the at least one photon emission device.

Abstract: A method and apparatus for evaluating code. A likelihood that a set of segments of the code will not run as desired based on a policy is identified. A risk of the code not performing as desired is evaluated based on a result from a code coverage test and the likelihood that the set of segments of the code will not run as desired.

Abstract: A compression system identifies one or more fields in a log file based on at least one field rule from among multiple field rules specified in a log file framework. The compression system extracts contents of the log file associated with the one or more fields. The compression system passes the contents associated with the one or more fields to corresponding compression engines from among a multiple compression engines each specified for performing a separate type of compression from among multiple types of compression for each of the one or more fields, wherein each of the one or more fields corresponds to one or more compression engines from among the multiple compression engines.

Abstract: System and computer-implemented methods herein design a configurable pipelined processor. Such systems and methods provide a configuration specification, by providing a base processor or digital design description, a base instruction set with a plurality of base instructions, and a plurality of configurable features. At least one of the configurable features is an additional instruction different from the base instructions. Further, such systems and methods generate a hardware implementation based on the configuration specification to produce a plurality of configured pipeline stages. The configured pipeline stages are different from base pipeline stages in a base processor or digital design hardware implementation (corresponding to the base processor or digital design description as a result of the additional instruction being included in the configuration specification).