Patents by Inventor Rohit Uday Suvarna

Rohit Uday Suvarna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250111169
    Abstract: Methods, systems, and devices for processing prompts by an array of large language models (LLMs). The system may provide the prompt to multiple LLMs. The multiple LLMs are trained on different datasets and have different knowledge and capabilities. The system receives multiple responses from the multiple LLMs, determines a rank for each of the multiple responses, the rank indicating a level of confidence of the corresponding response representing a ground truth, compares the ranks of the multiple responses, and selects the response having the best rank as the most probable ground truth response.
    Type: Application
    Filed: September 27, 2024
    Publication date: April 3, 2025
    Inventors: Sandeep Srinivasan, Rohit Uday Suvarna, Ethan F. Matus
  • Publication number: 20230153513
    Abstract: Methods, systems, and devices for tuning a set of simulation parameters associated with a design verification environment are described that include: simulating a circuit design according to a set of simulation runs; providing, to a machine learning network, an indication of functional coverage results associated with simulating the circuit design according to the set of simulation runs; receiving an output in response to the machine learning network processing the functional coverage results; and simulating the circuit design based on a recommended set of simulation parameters. The output includes: an indication of a near miss event associated with the functional coverage results; and the recommended set of simulation parameters. Simulating the circuit design based on the recommended set of simulation parameters includes generating a set of component signals associated with triggering the near miss event.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 18, 2023
    Inventors: William Alexander Hughes, Sandeep Srinivasan, Rohit Uday Suvarna
  • Publication number: 20230153500
    Abstract: Methods, systems, and devices for tuning a set of simulation parameters associated with a design verification environment are described that include: simulating a circuit design according to a set of simulation parameters; providing, to a machine learning network, an indication of functional coverage results associated with simulating the circuit design according to the set of simulation parameters; receiving an output in response to the machine learning network processing the functional coverage results; and simulating the circuit design based on a recommended set of simulation parameters, wherein simulating the circuit design based on the recommended set of simulation parameters includes generating a set of component signals associated with satisfying a target functional coverage statement. In some aspects, the output includes: the target functional coverage statement associated with the circuit design; and the recommended set of the simulation parameters.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 18, 2023
    Inventors: William Alexander Hughes, Sandeep Srinivasan, Rohit Uday Suvarna