Patents by Inventor Roi Levi

Roi Levi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128954
    Abstract: Technologies for duty cycle distortion (DCD) estimation are described. A transmitter includes a first output driver comprising a first complementary metal-oxide semiconductor (CMOS) amplifier and a first attenuator coupled to an output of the first CMOS amplifier. The first CMOS amplifier receives an input signal and outputs an intermediate signal to the first attenuator. The first attenuator receives the intermediate signal and outputs an output signal having a signal swing that is less than a signal swing of the input signal. A first duty cycle correction (DCC) loop is coupled to the first output driver. The first DCC loop estimates first DCD in the intermediate signal output by the first CMOS amplifier.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Inventors: Igal Kushnir, Naor Peretz, Roi Levi
  • Publication number: 20240056059
    Abstract: Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 15, 2024
    Inventors: Igal Kushnir, Naor Peretz, Roi Levi
  • Patent number: 11894847
    Abstract: Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: February 6, 2024
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Igal Kushnir, Naor Peretz, Roi Levi
  • Patent number: 11757428
    Abstract: This invention provides electromechanical resonators based on metal chalcogenide nanotubes. The invention further provides methods of fabrication of electromechanical resonators and methods of use of such electromechanical resonators.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: September 12, 2023
    Assignee: YEDA RESEARCH AND DEVELOPMENT CO. LTD.
    Inventors: Reshef Tenne, Ernesto Joselevich, Yiftach Divon, Roi Levi, Assaf Yaakobovitz, Dan Yudilevich
  • Publication number: 20220337222
    Abstract: This invention provides electromechanical resonators based on metal chalcogenide nanotubes. The invention further provides methods of fabrication of electromechanical resonators and methods of use of such electromechanical resonators.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicants: YEDA RESEARCH AND DEVELOPMENT CO. LTD., B.G. NEGEV TECHNOLOGIES AND APPLICATIONS LTD., at Ben-Gurion University
    Inventors: Reshef TENNE, Ernesto JOSELEVICH, Yiftach DIVON, Roi LEVI, Assaf YAAKOBOVITZ, Dan YUDILEVICH
  • Patent number: 11469768
    Abstract: A digital to analog converter (DAC) includes a first amplifier configured to receive a first bit of a data block as an input and output a first signal based on a value of the first bit of the data block, a first filter circuit configured to filter the first signal, an output configured to output an analog signal based on a combination of the filtered first signal and a second signal that represents a value of a second bit of the data block.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: October 11, 2022
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Igal Kushnir, Eshel Gordon, Roi Levi
  • Publication number: 20220278693
    Abstract: A digital to analog converter (DAC) includes a first amplifier configured to receive a first bit of a data block as an input and output a first signal based on a value of the first bit of the data block, a first filter circuit configured to filter the first signal, an output configured to output an analog signal based on a combination of the filtered first signal and a second signal that represents a value of a second bit of the data block.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 1, 2022
    Inventors: Igal Kushnir, Eshel Gordon, Roi Levi
  • Patent number: 11411551
    Abstract: This invention provides electromechanical resonators based on metal chalcogenide nanotubes. The invention further provides methods of fabrication of electromechanical resonators and methods of use of such electromechanical resonators.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: August 9, 2022
    Assignees: YEDA RESEARCH AND DEVELOPMENT CO. LTD., B. G. NEGEV TECHNOLOGIES AND APPLICATIONS LTD., AT BEN-GURION UNIVERSITY
    Inventors: Reshef Tenne, Ernesto Joselevich, Yiftach Divon, Roi Levi, Assaf Yaakobovitz, Dan Yudilevich
  • Patent number: 11240079
    Abstract: A data modulator for a transmitter includes a multiplexer configured to receive, at a first rate, a first data stream including a plurality of first symbols and a second data stream including a plurality of second symbols. The multiplexer is configured to selectively output, based on a first clock signal, the plurality of first symbols and the plurality of second symbols to form a third data stream that achieves a second rate greater than the first rate for transmission of the third data stream by the transmitter.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: February 1, 2022
    Assignee: MELLANOX TECHNOLOGIES TLV LTD.
    Inventors: Igal Kushnir, Eshel Gordon, Roi Levi
  • Publication number: 20200382100
    Abstract: This invention provides electromechanical resonators based on metal chalcogenide nanotubes. The invention further provides methods of fabrication of electromechanical resonators and methods of use of such electromechanical resonators.
    Type: Application
    Filed: December 27, 2017
    Publication date: December 3, 2020
    Applicants: YEDA RESEARCH AND DEVELOPMENT CO. LTD., B.G. NEGEV TECHNOLOGIES AND APPLICATIONS LTD.
    Inventors: Reshef TENNE, Ernesto JOSELEVICH, Yiftach DIVON, Roi LEVI, Assaf YAAKOBOVITZ, Dan YUDILEVICH
  • Patent number: 10630493
    Abstract: A physical unclonable function (PUF) array includes a plurality of PUF transistor cells each of which includes at least one inverter. An input and an output of the at least one inverter are shorted to a first reference node. There is adjustment circuitry for adjusting a reference voltage of the first reference node, and measurement circuitry for measuring a trip point of the at least one inverter. If the trip point is close to the reference voltage then bits of the at least one inverter are defined as unstable.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: April 21, 2020
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Joseph Shor, Roi Levi, Yoav Weizman
  • Publication number: 20190165953
    Abstract: A physical unclonable function (PUF) array includes a plurality of PUF transistor cells each of which includes at least one inverter. An input and an output of the at least one inverter are shorted to a first reference node. There is adjustment circuitry for adjusting a reference voltage of the first reference node, and measurement circuitry for measuring a trip point of the at least one inverter. If the trip point is close to the reference voltage then bits of the at least one inverter are defined as unstable.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 30, 2019
    Applicant: Bar Ilan University
    Inventors: Joseph Shor, Roi Levi, Yoav Weizman