Patents by Inventor Rokuro Kambe
Rokuro Kambe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7233066Abstract: A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.Type: GrantFiled: April 26, 2006Date of Patent: June 19, 2007Assignee: NEC Electronics CorporationInventors: Keiichiro Kata, Hirokazu Honda, Kazuhiro Baba, Tadanori Shimoto, Katsumi Kikuchi, Rokuro Kambe, Satoshi Hirano, Shinya Miyamoto
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Publication number: 20060189125Abstract: A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.Type: ApplicationFiled: April 26, 2006Publication date: August 24, 2006Inventors: Keiichiro Kata, Hirokazu Honda, Kazuhiro Baba, Tadanori Shimoto, Katsumi Kikuchi, Rokuro Kambe, Satoshi Hirano, Shinya Miyamoto
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Patent number: 7060604Abstract: A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.Type: GrantFiled: June 5, 2003Date of Patent: June 13, 2006Assignees: NGK Spark Plug Co., Ltd., NEC Electronics CorporationInventors: Keiichiro Kata, Hirokazu Honda, Kazuhiro Baba, Tadanori Shimoto, Katsumi Kikuchi, Rokuro Kambe, Satoshi Hirano, Shinya Miyamoto
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Patent number: 7002075Abstract: An intermediate substrate includes a substrate core formed by a main core body portion constructed of a sheet of polymer material and having a subsidiary core accommodation portion formed therein. A ceramic subsidiary core portion, which is constructed of a ceramic sheet, is accommodated in the subsidiary core accommodation portion and is of a thickness matching that of the main core body portion. A thin film capacitor is formed on a first main surface side of a plate-like base of the core portion and includes first and second thin film electrodes separated from each other by a thin film dielectric layer so as to provide direct current isolation between the electrodes. First and second direct current isolated terminals of a first terminal array are electrically connected to the first and second thin film electrodes.Type: GrantFiled: May 11, 2005Date of Patent: February 21, 2006Assignee: NGK SPark Plug Co., Ltd.Inventors: Rokuro Kambe, Yukihiro Kimura, Yasuhiro Sugimoto, Kazuhiro Suzuki
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Patent number: 6979890Abstract: An intermediate substrate is provided which reduces the effect of the difference in the coefficients of linear expansion between the terminals of the substrate and those of a semiconductor integrated circuit device, and which thus lowers the likelihood of disconnection due to thermal stress. The intermediate substrate, which is a planar member made of a polymeric material, includes a substrate core including a main core body having formed therein a sub-core compartment, and a ceramic sub-core section accommodated in the compartment. A first terminal array on the first principal surface side includes two types of terminals, functioning either as power source terminals or ground terminals, and a signal terminal. The array occupies an area entirely included within an orthogonally projected region of the sub-core section projected onto a reference plane parallel to the planar surface of the substrate core.Type: GrantFiled: May 12, 2005Date of Patent: December 27, 2005Assignee: NGK Spark Plug, Ltd.Inventors: Rokuro Kambe, Tetsuya Kasiwagi, Yukihiro Kimura, Yasuhiro Sugimoto, Kazuhiro Suzuki
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Publication number: 20050263867Abstract: An intermediate substrate is provided which reduces the effect of the difference in the coefficients of linear expansion between the terminals of the substrate and those of a semiconductor integrated circuit device, and which thus lowers the likelihood of disconnection due to thermal stress. The intermediate substrate, which is a planar member made of a polymeric material, includes a substrate core including a main core body having formed therein a sub-core compartment, and a ceramic sub-core section accommodated in the compartment. A first terminal array on the first principal surface side includes two types of terminals, functioning either as power source terminals or ground terminals, and a signal terminal. The array occupies an area entirely included within an orthogonally projected region of the sub-core section projected onto a reference plane parallel to the planar surface of the substrate core.Type: ApplicationFiled: May 12, 2005Publication date: December 1, 2005Inventors: Rokuro Kambe, Tetsuya Kasiwagi, Yukihiro Kimura, Yasuhiro Sugimoto, Kazuhiro Suzuki
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Publication number: 20050207091Abstract: An intermediate substrate includes a substrate core formed by a main core body portion constructed of a sheet of polymer material and having a subsidiary core accommodation portion formed therein. A ceramic subsidiary core portion, which is constructed of a ceramic sheet, is accommodated in the subsidiary core accommodation portion and is of a thickness matching that of the main core body portion. A thin film capacitor is formed on a first main surface side of a plate-like base of the core portion and includes first and second thin film electrodes separated from each other by a thin film dielectric layer so as to provide direct current isolation between the electrodes. First and second direct current isolated terminals of a first terminal array are electrically connected to the first and second thin film electrodes.Type: ApplicationFiled: May 11, 2005Publication date: September 22, 2005Inventors: Rokuro Kambe, Yukihiro Kimura, Yasuhiro Sugimoto, Kazuhiro Suzuki
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Publication number: 20050032258Abstract: A carrier sheet for green sheet having a green sheet forming face on which a green sheet is to be formed, comprising: metal foil; and a resin film stacked on a first surface of said metal foil on a side of said green sheet forming face having a smaller thickness than that of said metal foil.Type: ApplicationFiled: May 27, 2004Publication date: February 10, 2005Inventors: Hiroshi Katagiri, Rokuro Kambe, Manabu Sato, Kazumasa Koike, Masaharu Seto, Takatoshi Suganuma, Akira Mizoguchi
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Publication number: 20040053489Abstract: A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.Type: ApplicationFiled: June 5, 2003Publication date: March 18, 2004Applicants: NGK SPARK PLUG CO., LTD., NEC ELECTRONICS CORPORATIONInventors: Keiichiro Kata, Hirokazu Honda, Kazuhiro Baba, Tadanori Shimoto, Katsumi Kikuchi, Rokuro Kambe, Satoshi Hirano, Shinya Miyamoto
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Patent number: 6323439Abstract: A multilayer resin wiring board includes a metal core substrate having a first main surface and a second main surface; a plurality of wiring layers located on the first and second main surfaces of the metal core substrate; a plurality of insulating resin layers, each intervening between the metal core substrate and the wiring layers and between the metal core substrate and the wiring layers and between the wiring layers; and a via formed on the wall of a through hole for connection to the metal core substrate extending through the insulating resin layers and the metal core substrate so as to establish electrical conductivity to the metal core substrate. The metal core substrate has a thin portion which is thinner than the remaining portion of the metal core substrate. The through hole for connection to the metal core substrate is formed through the thin portion by laser machining.Type: GrantFiled: August 31, 1999Date of Patent: November 27, 2001Assignee: NGK Spark Plug Co., Ltd.Inventors: Rokuro Kambe, Toru Matsuura
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Patent number: 5196089Abstract: In a method of fabricating a multilayered interconnection for integrated circuit package, a coating of a metallized conductive pattern is formed on an upper surface of the substrate. A plurality of vertical copper studs are formed on the substrate for an interconnection with the metallized conductive pattern. A polyimide slurry is provided on the surface of the substrate to cover each top surface of the conductive studs. An upper surface of the polyimide slurry is polished to expose each top surface of the copper studs. A masking film is provided on each top surface of the copper studs prior to supplying an intermediate derivative of a polyimide polymer.Type: GrantFiled: August 28, 1991Date of Patent: March 23, 1993Assignee: Ngk Spark Plug Co., Ltd.Inventors: Toshikatsu Takada, Ryuji Imai, Rokuro Kambe
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Patent number: 4690872Abstract: A ceramic heater comprising a ceramic substrate is described which has formed thereon a layer of a silicide of an element selected from groups IVa, Va and VIa of the periodic table. The heater has stable temperature vs. resistance characteristics, has high mechanical strength and produces the desired temperature in a very short period of time.Type: GrantFiled: June 16, 1986Date of Patent: September 1, 1987Assignee: NGK Spark Plug Co., Ltd.Inventors: Norio Kato, Shunkichi Nozaki, Yukihiro Kimura, Rokuro Kambe
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Patent number: 4657825Abstract: The bond strength between a silicon carbide substrate and a metal layer comprised of a series of metal films is improved without detrimentally affecting other properties of such a device by interposing a layer of silicon, Si.sub.2 Mo or mixtures thereof between the substrate and the first metal film in the layer which is preferably Ti, Zr or Hf.Type: GrantFiled: December 23, 1985Date of Patent: April 14, 1987Assignee: NGK Spark Plug Co., Ltd.Inventors: Atsushi Kanda, Shunichi Takagi, Rokuro Kambe