Abstract: A processing unit of an analysis system comprises a processor coupled to a memory, and is configured to generate a structure-preserving reduced-order model of a circuit, device or system. The reduced-order model in one embodiment is generated by projection of input matrices characterizing the circuit, device or system onto at least one block Krylov subspace, the block Krylov subspace having a corresponding basis matrix. The projection utilizes at least one matrix that has a column range which includes a corresponding portion of the block Krylov subspace but is not itself the basis matrix of the block Krylov subspace. The processing unit generates a frequency response or other signal characterizing the circuit, device or system, based at least in part on the reduced-order model, and an associated output unit presents the generated signal in a user-perceptible format.