Abstract: A frequency synthesizer and method for synthesizing decimal frequencies. The synthesizer includes a seed generator, a clock synthesizer and an output synthesizer. The clock synthesizer includes a binary accumulator in a feedback signal path using a base reference frequency and a clock seed word for synthesizing a clock frequency and the output synthesizer includes a binary accumulator in a forward signal path using the clock frequency and an output seed word for synthesizing an output frequency. The output frequency is synthesized in decimal frequency steps from a decimal base reference frequency. Several output synthesizers may be driven in parallel from the same clock frequency for synthesizing several output frequencies in parallel.

Abstract: A frequency synthesizer and method for synthesizing decimal frequencies. The synthesizer includes a seed generator, a clock synthesizer and an output synthesizer. The clock synthesizer includes a binary accumulator in a feedback signal path using a base reference frequency and a clock seed word for synthesizing a clock frequency and the output synthesizer includes a binary accumulator in a forward signal path using the clock frequency and an output seed word for synthesizing an output frequency. The output frequency is synthesized in decimal frequency steps from a decimal base reference frequency. Several output synthesizers may be driven in parallel from the same clock frequency for synthesizing several output frequencies in parallel.

Abstract: A frequency synthesizer and a method using a first seed word and a variable clock rate derived from a second seed word for synthesizing a signal frequency. An accumulator accumulates the first seed word at the variable clock rate with a remainder word for updating a reference word at the variable clock rate. The reference word has a most significant bit (MSB) and less significant bits (LSB)s. The remainder word corresponds to the LSBs at overflows of the MSB. A tracking filter filters the MSB for providing a filtered output signal having an output frequency derived from the first seed word and the variable clock rate. The variable clock rate is derived by direct synthesis from the second seed word and single sideband frequency upconversion. The tracking filter can be a phase lock loop with frequency upconversion.

Abstract: A frequency synthesizer and a method for synthesizing a microwave output signal frequency. The synthesizer uses a reference signal having a variable frequency and accumulation in feedback of a phase locked loop for synthesizing a microwave output frequency. The feedback accumulation rate is derived from a first seed word and the variable reference frequency is derived from a second seed word. A spur suppressor having arithmetic frequency conversions reduces the levels of in-band spurious signals of the variable reference frequency signal in order to reduce the spurious signal levels in the output signal.

Abstract: Intermodulation distortion (IMD), especially in the form of adjacent-channel power ratio (ACPR), is an important specification for cellular base stations, especially for the power amplifier. Suppliers must demonstrate that they meet these specifications. The specifications for some of the newer communications formats, such as some forms of wideband CDMA and for multi-carrier base stations, dictate levels of ACP that seriously challenge the ability of test equipment to perform the measurement. Similar considerations apply to measuring other parameters that quantize intermodulation distortion effects, including multi-tone methods and noise power ratio. The present invention provides a technique for measuring ACP and other forms of IMD of amplifiers and other two -port devices. The technique, which uses standard equipment, enhances the normal dynamic range of measurement by at least 25 dB.

Abstract: In direct digital synthesizers in the prior art, the output signal maintains a phase continuity whenever it switches, or hops, frequency. This phase continuity shows up as a smooth change in phase from one frequency to the next; the phase of the last frequency transitions into the phase of the new frequency without any discernable disruption. Thus, whenever the output signal returns to a switched frequency that it previously has, the output signal at the newly returned switched frequency has a new phase relative to its previous one at that frequency. For some applications, like simulating continuous different frequency sources, this phase continuity is not desirable. To overcome this disadvantage, the preferred embodiment of the present invention provides phase memory to a direct digital synthesizer so that regardless of the frequency that the output signal switches to, the output signal at that frequency is able to maintain a constant phase relative to a reference system clock pulse.

Abstract: A novel signal synthesizer provides high frequency synthesized waveforms for the user. By converting phase information into digital outputs in parallel and by selectively coupling these digital outputs, an ordered digital output is formed to provide the high frequency waveforms. This ordered digital output, which represents points on a sine function, is converted to an analog signal for the synthesizer output. Furthermore, frequency and phase modulations of the synthesized waveforms are easily implemented with this novel signal synthesizer; the modulation information is simply added to the digital outputs prior to selectively coupling. Thus when the ordered digital output is converted to an analog signal, the analog signal contains the modulation information.