Abstract: The invention relates to a 3D inkjet printing process for producing a component with a conductor body and an insulating body. The invention further relates to a component produced using the method. For reasons of simplicity, the application refers to the conductor body and the insulating body in the singular, which includes the plural.

Abstract: A structure comprises: a plurality of substructures and a vernier-based position marker. The plurality of substructures include a first substructure, a second substructure, and at least one electronic component. The second substructure is at least partially additively manufactured on the first substructure. The vernier-based position marker is configured to indicate a relative offset between the first substructure and the second substructure.

Abstract: A chip device with a logic circuitry (105) protected by a randomized logic encryption based on a key (K) for preventing a designated usage of the logic circuitry (105) by an unauthorized user comprises: a physically unclonable function, PUF, (110), a storage (120), and a chip enabler (130) with one or more registers (132). The physically unclonable function, PUF, (110) is configured to generate a device-individual response (Re) based on a challenge (Ch). The storage (120) has stored the challenge (Ch) and a data element (C), the data element (C) being an encryption of the key (K) with the response (Re) of the PUF (110) as encryption key. The enabler (130) is configured to enable the logic circuitry (105) for the designated usage only, when the key (K) is transferred to the register(s) (132), the key (K) being a decryption of the data element (C) with the response (Re) as the encryption key.