Abstract: A computer system controls ordered memory operations according to a programmatically-configured ordering class protocol to enable parallel memory access while maintaining ordered read responses. The system includes a memory and/or cache memory including a memory/cache controller, an I/O device for communicating memory access requests from system data sources and a memory controller I/O Interface. Memory access requests from the system data sources provide a respective ordering class value. The memory controller I/O Interface processes each memory access request and ordering class value communicated from a data source through the I/O device in coordination with the ordering class protocol. Preferably, the I/O device includes at least one register for storing ordering class values associated with system data sources that implement memory access requests.

Abstract: A Resilient Packet Ring (RPR) add/drop device to connect multiple rings, e.g. SDH/SONET rings, wavelength or fibers, to a single switch or router device is disclosed. The add/drop device according to the invention comprises two multiplexing framer devices and an Add/Drop Multiplexor-Media Access Control (ADM-MAC) device. Each of the multiplexing framer devices combine at least two RPR data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa. The ADM-MAC device interfaces the two multiplexing framer devices and the switch or router device.

Abstract: The present invention relates to a device for combining at least two data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa, particularly, to a single SDH/SONET framer capable of handling a large range of SDH/SONET frames from STM-i to STM-j with an aggregated total capacity corresponding to an STM-j frame where i and j are integers in the range from 1 to 64 or higher according to the STM-N definition of the SDH/SONET standards. More over, the present invention can also be extended to work with STS-1 as lowest range. STS-1 exists in SONET only not SDH and corresponds to a data rate of 51.5 Mb/s a third of the 156 Mb/s of STM-1.

Abstract: The present invention relates to a device for combining at least two data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa, particularly, to a single SDH/SONET framer capable of handling a large range of SDH/SONET frames from STM-i to STM-j with an aggregated total capacity corresponding to an STM-j frame where i and j are integers in the range from 1 to 64 or higher according to the STM-N definition of the SDH/SONET standards. More over, the present invention can also be extended to work with STS-1 as lowest range. STS-1 exists in SONET only not SDH and corresponds to a data rate of 51.5 Mb/s a third of the 156 Mb/s of STM-1.

Abstract: According to the present invention a method and a device is provided for combining at least two data signals having a first data rate into a single data stream having a second data rate being higher than the first data rate for transmission on a shared medium or vice versa, said device comprises at least one port for receiving said at least two data signals and a port addressing unit for extracting data from the data signals received by said ports, wherein said port addressing unit is configured to place the extracted data at predetermined positions in said single data stream to be transmitted on said shared medium and at least one control data insertion unit is provided for placing control data in said single data stream. Thus, a method and device proposed implementing a multiplexing structure in which the data from M parallel low-speed channels are multiplexed onto a data bus operating with M times the data rate of the M low-speed channels. A multiple-stage process where, e.g.

Abstract: The present invention concerns a packet-processing apparatus and a packet switch adapter for the processing of variable-length packets comprising packet data and packet information. The adapter and/or the apparatus comprises a distributor for distributing the packets to several parallel, identical processing paths, each comprising at least one processing unit, whereto the packets are fed and which is able to process only for one of the packets its packet information at any moment in time. The feeding is interruptable for feeding a different of the packets to another of the processing paths. Furthermore, a packet-processing method for distributing received variable-length packets to several parallel, identical processing paths is disclosed.

Abstract: The present invention relates to a device for combining at least two data signals having an input data rate into a single data stream having an output data rate being higher than the input data rate for transmission on a shared medium or vice versa, particularly, to a single SDH/SONET framer capable of handling a large range of SDH/SONET frames from STM-i to STM-j with an aggregated total capacity corresponding to an STM-j frame where i and j are integers in the range from 1 to 64 or higher according to the STM-N definition of the SDH/SONET standards. More over, the present invention can also be extended to work with STS-1 as lowest range. STS-1 exists in SONET only not SDH and corresponds to a data rate of 51.5 Mb/s a third of the 156 Mb/s of STM-1.

Abstract: The present invention relates to a method and device for creating an aligned outgoing data stream of a predetermined width and clock rate from an unaligned incoming data stream, particularly, for creating a several byte wide parallel data stream fully aligned to a SDH/SONET frame.

Abstract: An apparatus is provided for processing a sequential stream of fixed length cells received via a slotted data transmission medium. The cells may be asynchronous transfer mode (ATM) cells. The apparatus utilizes a demultiplexer to create N (N=2,3,4 . . . ) sub-streams of cells from the input stream and to pass each sub-stream to one of N processing paths. Each of the processing paths is identical and they operate in parallel. The cell sub-streams are fed into the processing paths in a chronological, staggered manner where the time between one sub-stream being fed into its processing path and the next sub-stream being fed into another processing path is equal to the slot duration of the transmission medium. Finally, the apparatus utilizes a multiplexer to combine the processed sub-streams into an output stream which maintains both the sequential order of the cells and their arrangement in the slots of the slotted transmission medium.

Abstract: Optical waveguide isolator (121) for monolithic integration with semiconductor light emitting diodes such as Fabry-Perot or ring laser diodes. The present optical isolator (121), with optical input port (95) and output pod (96), comprises a branching waveguide coupler (56). This branching waveguide coupler (56) has a waveguide stem (60) splitted at one end into two waveguide branches (57, 58) such that a light wave fed via said input pod (95) into a first of these branches (58), is guided via the waveguide stem (60) and the output pod (96) out of the device. A light wave fed to the isolator's output pod (96) is guided along the stem (60) and coupled into the second waveguide branch (57).

Abstract: This method for photoemission inspection of via studs in integrated circuit packages is based on the large photoemission contrast between the metals used in integrated circuit manufacture and insulating contaminants which may have remained from previous fabrication steps. A light source (27) sheds a beam of photons having energies above the work function of said metals and below the work function of said insulators onto the via connection (18, 19, 24, 25, 26) under inspection. The electrons photoemitted from the metallization are detected by a channelplate detector (28, 29, 31) which is divided into a plurality of identical segments the size of which is chosen smaller than the smallest contaminant expected. An electron gun (34) supplies low-energy electrons for neutralizing charges occurring in the conducting parts on the surface of the integrated circuit package (21) owing to the induced photoemission of electrons from the via connections (18, 19, 24, 25, 26).

Abstract: This chip-to-test (1) has a passivation layer and an overlayer at test points (4). The system comprises a vacuum chamber (8), means (2) for mounting and connecting the chip-to-test (1), a pulsed light source means (9) operable to scan the chip-to-test (1) for inducing photoelectron (15) emission therefrom, means (14) for exercising the circuits of the chip-to-test (1), means (18) for detecting the photoelectrons (15), having a detection threshold and delivering a sequence of signals representative of voltages at the currently scanned test point (4') or points as a function of the scanned point or scanning time, means (23) for flooding the chip-to-test (1) with electrons of energy lower than the detection threshold, means (21) for analyzing said sequence of signlas and means (22) for deriving therefrom a capacitive voltage contrast. The material of the overlayer has a work function lower than the photon energy and can be BeO, MgO, CaO, TiO2, more preferably SrO, Cs2O, BaO or a mixture thereof.

Abstract: For testing the integrity of conducting lines on or in a substrate, the following steps are executed: (I) Selected pads are irradiated by a focused optical beam so that they are positively charged due to photon-assisted tunneling of electrons from those pads. The charges propagate through existing conductors so that all selected pads and all pads connected to them assume a specific voltage. (II) The whole surface is irradiated by a flooding optical beam. Photon-assisted tunneling of electrons will now occur from those pads which were not charged previously. (III) The tunneling electrons excite an electroluminescent layer whose illumination reveals the spatial distribution of uncharged pads. This method is performed in air under atmospheric conditions and allows completely contactless testing of circuitry to detect line interruptions as well as shortcuts between separate lines. It is suited for surface lines, buried lines and for via connections.

Abstract: For observing material structures and/or dynamic processes at surfaces, the known scanning tunneling microscope (STM) is combined with a photoexcitation process leading to photon-assisted tunneling. Thereby, the very fine spatial resolution of the STM is combined with the picosecond or even femtosecond time resolution of laser pulses. The tunnel tip of a scanning tunneling microscope is positioned at tunnel distance with respect to the surface of the sample to be investigated, with an appropriate potential applied across the gap between the tunnel tip and the sample. The tunneling current is gated by means of at least one pulsed laser beam directed at the tuneling region and/or at the tunnel tip.

Abstract: For testing the integrity of conducting lines on or in a substrate, the following steps are executed: (I) Selected pads are irradiated by a focused optical beam so that they are positively charged due to photon-assisted tunneling of electrons from those pads. The charges propagate through existing conductors so that all selected pads and all pads connected to them assume a specific voltage. (II) The whole surface is irradiated by a flooding optical beam. Photon-assisted tunneling of electrons will now occur from those pads which were not charged previously. (III) The tunneling electrons excite an electroluminescent layer whose illumination reveals the spatial distribution of uncharged pads. This method is performed in air under atmospheric conditions and allows completely contactless testing of circuitry to detect line interruptions as well as shortcuts between separate lines. It is suited for surface lines, buried lines and for via connections.

Abstract: A method for contactlessly testing for opens and shorts in conducting paths within or on a nonconducting substrate. There are a plurality of conducting pads on the surface of the substrate. Charges are contactlessly generated, e.g., by an optical beam, in at least one selected pad inducing a voltage thereon and on pads electrically connected therewith through one of the conducting paths. A two dimensional electron flux is contactlessly caused to be emitted from the selected pad and at least one other pad of the plurality of pads, e.g., by an optical beam. The flux emitted from the pads depends on the voltage on each pad. The flux is detected to distinguish pads in electrical connection.