Abstract: An apparatus reads a chip design comprising first and second blocks corresponding to first and second hardware modules, nodes, and data path segments that each connect a pair of nodes or a node to a block. Tracing backward along data paths that terminate at the second block, the apparatus identifies a secure cone. The secure cone comprises secure path segments of the data paths terminating at the second block and corresponding nodes. The apparatus identifies data paths originating at the first block and that are at least partially within the secure cone and determines whether any terminate outside the secure cone. When none of the data paths originating at the first block terminate outside the secure cone, the apparatus verifies the chip design. When a data path originating at the first block terminates outside the secure cone, the apparatus determines that the chip design has a potential leak.

Abstract: An apparatus reads a chip design comprising first and second blocks corresponding to first and second hardware modules, nodes, and data path segments that each connect a pair of nodes or a node to a block. Tracing backward along data paths that terminate at the second block, the apparatus identifies a secure cone. The secure cone comprises secure path segments of the data paths terminating at the second block and corresponding nodes. The apparatus identifies data paths originating at the first block and that are at least partially within the secure cone and determines whether any terminate outside the secure cone. When none of the data paths originating at the first block terminate outside the secure cone, the apparatus verifies the chip design. When a data path originating at the first block terminates outside the secure cone, the apparatus determines that the chip design has a potential leak.

Abstract: The present invention is directed to a method and system for testing, during runtime, the correctness of a computer program (such as a hypervisor, an operating system or an interpreter) that controls a system and has one or more software modules. Accordingly, a reflexive code of a reflex function is integrated into the software modules or into a virtual infrastructure that executes the computer program. Whenever desired, the reflexive code is activated by an input and its corresponding output is processed. Then, the correctness of the one or more software modules or of the computer program is determined according to the processing results.

Abstract: The present invention is directed to a method and system for testing, during runtime, the correctness of a computer program (such as a hypervisor, an operating system or an interpreter) that controls a system and has one or more software modules. Accordingly, a reflexive code of a reflex function is integrated into the software modules or into a virtual infrastructure that executes the computer program. Whenever desired, the reflexive code is activated by an input and its corresponding output is processed. Then, the correctness of the one or more software modules or of the computer program is determined according to the processing results.