Patents by Inventor Roman Mostinski
Roman Mostinski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10268618Abstract: Various semiconductor chips and computing devices are disclosed. In one aspect a semiconductor chip is provided that includes a first interface controller, a first physical layer connected to the first interface controller, a second interface controller, a second physical layer connected to the second interface controller, and a switch connected between the first interface controller and the second interface controller and the first physical layer and the second physical layer. The switch is operable in one mode to route signals to/from the first interface controller via the first physical layer and route signals to/from the second interface controller via the second physical layer and in another mode to route signals to/from both the first interface controller and the second interface controller via the first physical layer.Type: GrantFiled: April 16, 2015Date of Patent: April 23, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Dror Geva, Eyal Liser, Roman Mostinski
-
Patent number: 9906355Abstract: There is provided a method, apparatus and integrated circuit for measuring a signal, the apparatus comprising a plurality of sample stages arranged in series, each sample stage comprising a delay element, and a sample element, wherein an input of the sample element is coupled to an output of the delay element, and a strobe line for controlling a sample time of the sample elements, the strobe line comprising a plurality of strobe delay elements arranged in series, wherein an output of each strobe delay element is coupled to one or more sample elements.Type: GrantFiled: January 9, 2013Date of Patent: February 27, 2018Assignee: NXP USA, Inc.Inventors: Michael Priel, Leonid Fleshel, Roman Mostinski, Vladimir Nusimovich
-
Patent number: 9781138Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.Type: GrantFiled: July 20, 2015Date of Patent: October 3, 2017Assignee: NXP USA, Inc.Inventors: Roman Mostinski, Asaf Ashkenazi
-
Publication number: 20160306763Abstract: Various semiconductor chips and computing devices are disclosed. In one aspect a semiconductor chip is provided that includes a first interface controller, a first physical layer connected to the first interface controller, a second interface controller, a second physical layer connected to the second interface controller, and a switch connected between the first interface controller and the second interface controller and the first physical layer and the second physical layer. The switch is operable in one mode to route signals to/from the first interface controller via the first physical layer and route signals to/from the second interface controller via the second physical layer and in another mode to route signals to/from both the first interface controller and the second interface controller via the first physical layer.Type: ApplicationFiled: April 16, 2015Publication date: October 20, 2016Inventors: Dror Geva, Eyal Liser, Roman Mostinski
-
Publication number: 20150364098Abstract: A device and method for controlling a display. The method includes receiving image data, determining backlight illumination intensity in response to an allowed image degradation level parameter and to ambient light, and determining a display refresh parameter in response to a temperature parameter. A method and device for controlling a display, the device includes: a frame buffer adapted to receive image data, a processor adapted to receive a power parameter and an allowed image degradation level parameter, and an image converter that is adapted to perform a linear image conversion and a non-linear image conversion. The processor is adapted to determine which conversion to perform in response to a power parameter.Type: ApplicationFiled: August 24, 2015Publication date: December 17, 2015Inventor: ROMAN MOSTINSKI
-
Publication number: 20150338464Abstract: There is provided a method, apparatus and integrated circuit for measuring a signal, the apparatus comprising a plurality of sample stages arranged in series, each sample stage comprising a delay element, and a sample element, wherein an input of the sample element is coupled to an output of the delay element, and a strobe line for controlling a sample time of the sample elements, the strobe line comprising a plurality of strobe delay elements arranged in series, wherein an output of each strobe delay element is coupled to one or more sample elements.Type: ApplicationFiled: January 9, 2013Publication date: November 26, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Michael PRIEL, Leonid FLESHEL, Roman MOSTINSKI, Vladimir NUSIMOVICH
-
Publication number: 20150324584Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.Type: ApplicationFiled: July 20, 2015Publication date: November 12, 2015Inventors: ROMAN MOSTINSKI, ASAF ASHKENAZI
-
Patent number: 9094441Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.Type: GrantFiled: June 13, 2006Date of Patent: July 28, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Roman Mostinski, Asaf Ashkenazi
-
Patent number: 8706928Abstract: An integrated circuit comprises a shared resource for providing data to a buffer. The buffer is coupled to a buffer level monitor and a filling circuit. An access-requesting circuit is coupled to the shared resource for receiving the data from the shared resource when the access-requesting circuit has access to the shared resource. An arbiter is coupled to the shared resource, the filling circuit, and the access-requesting circuit, for receiving access requests from the filling circuit and from the access-requesting circuit, and for granting to a selected one thereof access to the shared resource. A controller is coupled to the buffer level monitor and to the access-requesting circuit, for causing the access-requesting circuit to reduce a rate of access requests sent to the arbiter when a condition involving the monitored level of data in the buffer indicates an anticipated violation of a timing constraint.Type: GrantFiled: November 26, 2009Date of Patent: April 22, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Roman Mostinski, Lavi Koch, Leonid Smolyansky
-
Patent number: 8462141Abstract: A display controller for controlling data in an isochronous display where fluctuation of data feed latency occurs, the display controller including an input memory which receives pixel data and transmits the pixel data through a main route and a secondary route; wherein pixel data is transmitted through the main route and is processed for delivery to the display in a predetermined manner; characterized in that the secondary route comprises a memory for storing a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time; further characterized in that the display controller includes a detector for identifying a data feed latency event and in response there to switching the transmission of the pixel data to the secondary route and processing the pixel data through secondary route for delivery to the display such that when a data feed latency event occurs the stored two-dimensional section of the pixel data from the secondarType: GrantFiled: April 26, 2007Date of Patent: June 11, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Roman Mostinski, Mikhail Bourgart, Edward Vaiberman
-
Publication number: 20120226833Abstract: An integrated circuit and a method for reducing violations of a timing constraint. The integrated circuit comprises a shared resource for providing data and a buffer for storing data. A buffer level monitor is coupled to the buffer, for monitoring a monitored level of data in the buffer. A retrieving circuit is coupled to the buffer, for retrieving the data from the buffer, according to a timing constraint. A filling circuit is coupled to the buffer for writing the data to the buffer and coupled to the shared resource for receiving the data from the shared resource when the filling circuit has access to the shared resource. An access-requesting circuit is coupled to the shared resource for receiving the data from the shared resource when the access-requesting circuit has access to the shared resource.Type: ApplicationFiled: November 26, 2009Publication date: September 6, 2012Applicant: Freescale Semiconductor, Inc.Inventors: Roman Mostinski, Lavi Koch, Leonid Smolyansky
-
Patent number: 8181049Abstract: A method for controlling power consumption of a processor, the method includes: receiving an indicator that indicates that the processor is expected to change its activity; determining, in response to the indicator and to a current power consumption of the processor, whether to change a frequency of a clock signal that is provided to the processor; and changing, if determining to change the frequency of the clock signal, the frequency of the clock signal by a reduction of the frequency of the clock signal that is followed by an increment of the frequency of the clock signal; wherein the changing of the frequency of the clock signal is responsive to an expected change of a supply voltage that is supplied to the processor as a result of a possible change in a power consumption of the processor due to an expected change of activity of the processor.Type: GrantFiled: January 16, 2009Date of Patent: May 15, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Anton Rozen, Roman Mostinski, Michael Priel
-
Patent number: 8171187Abstract: A system having memory access capabilities, the system includes: (i) a dynamic voltage and frequency scaling (DVFS) controller, adapted to determine a level of a voltage supply supplied to a first memory access requester and a frequency of a clock signal provided to the first memory access requester and to generate a DVFS indication that is indicative of the determination; (ii) a hardware access request determination module, adapted to determine a priority of memory access request issued by the first memory access requester in response to the DVFS indication; and (iii) a direct memory access arbitrator, adapted to arbitrate between memory access requests issued by the first memory access requester and another memory access requester in response to priorities associated with the memory access requests.Type: GrantFiled: July 25, 2008Date of Patent: May 1, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Anton Rozen, Roman Mostinski, Michael Priel, Leonid Smolyansky
-
Publication number: 20110154509Abstract: A device for providing a security breach indicative audio alert. The device includes: a security monitor adapted to detect a security breach in device and a loudspeaker, the device wherein including a secure audio alert generating hardware, adapted to participate, in response to the detection of the security breach, in a generation of a security breach indicative audio alert. The secure audio alert generating hardware is connected to an audio mixer that is adapted to mix the security breach indicative audio alert signal with audio signals generated by a software controlled audio source to provide a mixed signal. The audio mixer is further adapted to provide the mixed signal to the loudspeaker that reproduces the mixed signal as sound.Type: ApplicationFiled: June 13, 2006Publication date: June 23, 2011Inventors: Roman Mostinski, Asaf Ashkenazi
-
Publication number: 20100185878Abstract: A method for controlling power consumption of a processor, the method includes: receiving an indicator that indicates that the processor is expected to change its activity; determining, in response to the indicator and to a current power consumption of the processor, whether to change a frequency of a clock signal that is provided to the processor; and changing, if determining to change the frequency of the clock signal, the frequency of the clock signal by a reduction of the frequency of the clock signal that is followed by an increment of the frequency of the clock signal; wherein the changing of the frequency of the clock signal is responsive to an expected change of a supply voltage that is supplied to the processor as a result of a possible change in a power consumption of the processor due to an expected change of activity of the processor.Type: ApplicationFiled: January 16, 2009Publication date: July 22, 2010Inventors: Anton Rozen, Roman Mostinski, Michael Priel
-
Publication number: 20100073388Abstract: A display controller for controlling data in an isochronous display where fluctuation of data feed latency occurs, the display controller including an input memory which receives pixel data and transmits the pixel data through a main route and a secondary route; wherein pixel data is transmitted through the main route and is processed for delivery to the display in a predetermined manner; characterised in that the secondary route comprises a memory for storing a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time; further characterised in that the display controller includes a detector for identifying a data feed latency event and in response there to switching the transmission of the pixel data to the secondary route and processing the pixel data through secondary route for delivery to the display such that when a data feed latency event occurs the stored two-dimensional section of the pixel data from the secondarType: ApplicationFiled: April 26, 2007Publication date: March 25, 2010Inventors: Roman Mostinski, Mikhail Bourgart, Edward Vaiberman
-
Publication number: 20100023653Abstract: A system having memory access capabilities, the system includes: (i) a dynamic voltage and frequency scaling (DVFS) controller, adapted to determine a level of a voltage supply supplied to a first memory access requester and a frequency of a clock signal provided to the first memory access requester and to generate a DVFS indication that is indicative of the determination; (ii) a hardware access request determination module, adapted to determine a priority of memory access request issued by the first memory access requester in response to the DVFS indication; and (iii) a direct memory access arbitrator, adapted to arbitrate between memory access requests issued by the first memory access requester and another memory access requester in response to priorities associated with the memory access requests.Type: ApplicationFiled: July 25, 2008Publication date: January 28, 2010Inventors: Anton Rozen, Roman Mostinski, Michael Priel, Leonid Smolyansky
-
Publication number: 20080204481Abstract: A device and method for controlling a display. The method includes: receiving image data, determining backlight illumination intensity in response to an allowed image degradation level parameter and to ambient light, and determining a display refresh parameter in response to a temperature parameter. A method and device for controlling a display, the device includes: a frame buffer adapted to receive image data, a processor adapted to receive a power parameter and an allowed image degradation level parameter, and an image converter that is adapted to perform a linear image conversion and a non-linear image conversion. The processor is adapted to determine which conversion to perform in response to a power parameter.Type: ApplicationFiled: April 20, 2005Publication date: August 28, 2008Applicant: Freescale Semiconductor, Inc.Inventor: Roman Mostinski