Abstract: A method and semiconductor device for controlling skip mode operation during light load conditions in a resonant power converter includes a skip mode controller circuit that compares a feedback signal corresponding to the secondary output level with a reference voltage to determine when to invoke skip mode. When entering skip mode the skip mode controller ceases switching by turning on the lower switch for a prolonged time to leave the resonant capacitor partially charged. Upon resuming switching, the lower switch is turned on first to drive current through the inductances, and asymmetric switching is used where the upper switch is on, initially for shorter periods to allow zero voltage switching. If the load increases, the on-time of upper and lower switches converge and conventional symmetric switching resumes.

Abstract: A method and semiconductor device for a resonant power converter includes logic circuitry that performs a dedicated startup sequence when power is first provided to the resonant converter. The logic circuitry can discharge the resonant capacitor, then iteratively pulse only an upper switch during a portion of the startup sequence, and measures the dead time between the half bridge signal starting to fall and the next time it finishes rising. If the dead time is greater that a startup exit value, which is based on the most recent upper switch on-time, then the upper switch on-time is incremented and the process is repeated until the dead time is less than the startup exit value, whereupon the startup logic transitions to conventional symmetric switching.

Abstract: In one embodiment, a power supply controller may be configured to form a status signal that is representative of a secondary current by substantially removing a primary magnetization component from a primary current signal and to use the status signal to form a first signal that is representative of a delivered output power, and configured to adjust an on-time of one of a first or second switch responsively to the delivered output power.

Abstract: In one form, a synchronous rectifier controller includes a drive clamp adjust terminal, a drive terminal, a clamp voltage generator circuit coupled to the drive clamp adjust terminal for measuring a signal at the drive clamp adjust terminal and providing a clamp voltage having a value determined by the signal, and a driver for providing a drive signal to the drive terminal at a voltage related to the clamp voltage during an active period of the drive signal. In an alternate form a power converter includes a rectifier transistor having a first current electrode, a control electrode for receiving a drive signal, and a second current electrode, and a synchronous rectifier controller having a first terminal coupled to the control electrode of the rectifier transistor for providing the drive signal alternately in an active state and an inactive state.

Abstract: In one embodiment, a synchronous rectifier controller is configured to initiate forming an off-time interval for a first period of time responsively to the controller forming a disable state of a switching signal wherein the control circuit maintains the switching signal in the disable state for at least the off-time interval. The controller is also configured to restart forming the off-time interval responsively to a voltage of a synchronous rectifier becoming a first value prior to expiration of the first period of time.

Abstract: In one embodiment, a synchronous rectifier controller is configured to initiate forming an off-time interval for a first period of time responsively to the controller forming a disable state of a switching signal wherein the control circuit maintains the switching signal in the disable state for at least the off-time interval. The controller is also configured to restart forming the off-time interval responsively to a voltage of a synchronous rectifier becoming a first value prior to expiration of the first period of time.

Abstract: An integrated circuit includes a first pin for receiving a feedback signal, a second pin for receiving a current signal indicative of a current in a primary of a transformer, and a switching circuit coupled to the first and second pins and responsive to the feedback signal to determine a frequency at which to provide an upper drive signal and a lower drive signal, and further responsive to the current signal to change a value of the feedback signal when the current signal exceeds a first threshold, and to stop providing the upper and lower drive signals when the current signal exceeds a second threshold, the second threshold higher than the first threshold.

Abstract: A circuit and method for compensating for parasitic elements of a transistor. A transistor, a controller, and a compensation element are mounted to a printed circuit board. The transistor includes parasitic drain and source inductors. The compensation element may be a discrete inductor that has an inductance value equal to about the sum of the inductance values of the parasitic drain and source inductors. The magnitudes of the compensation voltage and the sum of the voltages across the parasitic drain and source inductances are substantially equal. Thus, the compensation voltage developed across the compensation inductor is used to adjust a reference voltage within the controller. A drain-to-source voltage is applied to one input of a comparator within the controller and the adjusted reference voltage is applied to another input of the comparator. An output signal of the comparator is input to drive circuitry that drives a gate of the transistor.

Abstract: In one form, a synchronous rectifier controller includes a drive clamp adjust terminal, a drive terminal, a clamp voltage generator circuit coupled to the drive clamp adjust terminal for measuring a signal at the drive clamp adjust terminal and providing a clamp voltage having a value determined by the signal, and a driver for providing a drive signal to the drive terminal at a voltage related to the clamp voltage during an active period of the drive signal. In an alternate form a power converter includes a rectifier transistor having a first current electrode, a control electrode for receiving a drive signal, and a second current electrode, and a synchronous rectifier controller having a first terminal coupled to the control electrode of the rectifier transistor for providing the drive signal alternately in an active state and an inactive state.

Abstract: An integrated circuit includes a first pin for receiving a feedback signal, a second pin for receiving a current signal indicative of a current in a primary of a transformer, and a switching circuit coupled to the first and second pins and responsive to the feedback signal to determine a frequency at which to provide an upper drive signal and a lower drive signal, and further responsive to the current signal to change a value of the feedback signal when the current signal exceeds a first threshold, and to stop providing the upper and lower drive signals when the current signal exceeds a second threshold, the second. threshold higher than the first threshold.

Abstract: In one embodiment, a control circuit for a series resonant switching power supply control system is configured to disable a power switch of secondary side of the system in response to a polarity reversal of the voltage across a primary side winding of the system.

Abstract: A method and circuit for detecting a current and compensating for an offset voltage. The circuit includes two comparators where one of the comparators has two input terminals and the other comparator has three input terminals. An input terminal of each of the two comparators are commonly connected together, the other input terminal of the two-input comparator is coupled for receiving a first reference voltage, and a second input terminal of the three-input comparator is coupled for receiving a second reference voltage. During a first portion of the period of a sense signal the two comparators operate in a sensing mode and during a second portion of the period of the sense signal the comparator having the three input terminals operate in a current nullification mode or an offset voltage compensation mode. An offset compensation signal is generated during the second portion of the sense signal.

Abstract: A method and circuit for detecting a current and compensating for an offset voltage. The circuit includes two comparators where one of the comparators has two input terminals and the other comparator has three input terminals. An input terminal of each of the two comparators are commonly connected together, the other input terminal of the two-input comparator is coupled for receiving a first reference voltage, and a second input terminal of the three-input comparator is coupled for receiving a second reference voltage. During a first portion of the period of a sense signal the two comparators operate in a sensing mode and during a second portion of the period of the sense signal the comparator having the three input terminals operate in a current nullification mode or an offset voltage compensation mode. An offset compensation signal is generated during the second portion of the sense signal.

Abstract: A circuit and method for compensating for parasitic elements of a transistor. A transistor, a controller, and a compensation element are mounted to a printed circuit board. The transistor includes parasitic drain and source inductors. The compensation element may be a discrete inductor that has an inductance value equal to about the sum of the inductance values of the parasitic drain and source inductors. The magnitudes of the compensation voltage and the sum of the voltages across the parasitic drain and source inductances are substantially equal. Thus, the compensation voltage developed across the compensation inductor is used to adjust a reference voltage within the controller. A drain-to-source voltage is applied to one input of a comparator within the controller and the adjusted reference voltage is applied to another input of the comparator. An output signal of the comparator is input to drive circuitry that drives a gate of the transistor.

Abstract: In one embodiment, a control circuit for a series resonant switching power supply control system is configured to disable a power switch of secondary side of the system in response to a polarity reversal of the voltage across a primary side winding of the system.

Abstract: In one embodiment, a power supply controller is configured to switch a power switch of a power supply when a voltage across the switch is at a minimum value.

Abstract: In one embodiment, a power supply controller is configured to switch a power switch of a power supply when a voltage across the switch is at a minimum value.