Patents by Inventor Roman Tschirbs

Roman Tschirbs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8237260
    Abstract: A power semiconductor module with segmented base plate. One embodiment provides a semiconductor module including a base plate and at least two circuit carriers. The base plate includes at least two base plate segments spaced distant from one another. Each of the circuit carriers includes a ceramic substrate provided with at least a first metallization layer. Each of the circuit carriers is arranged on exactly one of the base plate segments. At least two of the circuit carriers are spaced distant from one another.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: August 7, 2012
    Assignee: Infineon Technologies AG
    Inventor: Roman Tschirbs
  • Patent number: 7910952
    Abstract: One aspect relates to a power semiconductor arrangement includes a power semiconductor module which is mechanically connected to a heat sink. In order to improve the thermal cycling stability of the connection between a baseplate of the module and a circuit carrier connected thereto, recesses are provided in the baseplate. One aspect further relates to a power semiconductor module.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 22, 2011
    Assignee: Infineon Technologies AG
    Inventors: Roman Tschirbs, Reinhold Bayerer
  • Patent number: 7763970
    Abstract: A power semiconductor module comprises a housing. The housing comprises a casing and at least one coating of high resistance to surface tracking. A plurality of electrical conductors is provided on the housing. The coating is provided on a creepage distance that is provided between the electrical conductors.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: July 27, 2010
    Assignee: Infineon Technologies AG
    Inventors: Roman Tschirbs, Reinhold Spanke
  • Publication number: 20100127371
    Abstract: A power semiconductor module with segmented base plate. One embodiment provides a semiconductor module including a base plate and at least two circuit carriers. The base plate includes at least two base plate segments spaced distant from one another. Each of the circuit carriers includes a ceramic substrate provided with at least a first metallization layer. Each of the circuit carriers is arranged on exactly one of the base plate segments. At least two of the circuit carriers are spaced distant from one another.
    Type: Application
    Filed: November 26, 2008
    Publication date: May 27, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Roman Tschirbs
  • Publication number: 20090213553
    Abstract: A power semiconductor module comprises a housing. The housing comprises a casing and at least one coating of high resistance to surface tracking. A plurality of electrical conductors is provided on the housing. The coating is provided on a creepage distance that is provided between the electrical conductors.
    Type: Application
    Filed: February 27, 2008
    Publication date: August 27, 2009
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Roman Tschirbs, Reinhold Spanke
  • Patent number: 7511961
    Abstract: A power semiconductor module is to be pressed to a heat sink with a first surface of a first side of a base plate. To reduce the heat transfer resistance between the base plate and the heat sink, the first surface has, at least in a state, when the power semiconductor module is not pressed against the heat sink, at least one inflection point.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: March 31, 2009
    Assignee: Infineon Technologies AG
    Inventors: Roman Tschirbs, Reinhold Bayerer
  • Publication number: 20080101032
    Abstract: A power semiconductor module is to be pressed to a heat sink with a first surface of a first side of a base plate. To reduce the heat transfer resistance between the base plate and the heat sink, the first surface has, at least in a state, when the power semiconductor module is not pressed against the heat sink, at least one inflection point.
    Type: Application
    Filed: October 26, 2006
    Publication date: May 1, 2008
    Inventors: Roman Tschirbs, Reinhold Bayerer
  • Publication number: 20080079145
    Abstract: One aspect relates to a power semiconductor arrangement includes a power semiconductor module which is mechanically connected to a heat sink. In order to improve the thermal cycling stability of the connection between a baseplate of the module and a circuit carrier connected thereto, recesses are provided in the baseplate. One aspect further relates to a power semiconductor module.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 3, 2008
    Applicant: Infineon Technologies AG
    Inventors: Roman Tschirbs, Reinhold Bayerer
  • Publication number: 20050077947
    Abstract: A half-bridge circuit, in which an input signal that is applied between two input terminals can be picked up at a phase output comprises two switching transistors controlled by a respective control signal that is applied between a control electrode and an auxiliary electrode and two diodes. The first input terminal is connected to the first electrode of the first switching transistor and to the first diode's cathode. A second electrode of the first switching transistor is connected to the first diode's anode by means of the phase output, via a line, to a first electrode of the second switching transistor and to a cathode of the second diode. A second electrode of the second switching transistor is connected to an anode of the second diode and to the second input terminal. The auxiliary electrode of the first switching transistor is connected to the line of the phase output.
    Type: Application
    Filed: November 1, 2004
    Publication date: April 14, 2005
    Inventors: Mark Munzer, Roman Tschirbs
  • Patent number: 6756877
    Abstract: The present invention relates to a configuration having a first shunt resistor and at least one second shunt resistor connected in parallel with the first shunt resistor. The load terminals of the shunt resistors are disposed at the front side of the shunt resistors and between a first and a second supply potential. The load terminals each have a large-area rear-side contact connection to which different potentials are applied.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: June 29, 2004
    Assignee: Infineon Technologies AG
    Inventors: Torsten Franke, Roman Tschirbs
  • Publication number: 20030075732
    Abstract: The present invention relates to a configuration having a first shunt resistor and at least one second shunt resistor connected in parallel with the first shunt resistor. The load terminals of the shunt resistors are disposed at the front side of the shunt resistors and between a first and a second supply potential. The load terminals each have a large-area rear-side contact connection to which different potentials are applied.
    Type: Application
    Filed: September 9, 2002
    Publication date: April 24, 2003
    Inventors: Torsten Franke, Roman Tschirbs