Abstract: A switch mode power supply (15) employs a rectifier (20), a converter (50) and converter driver (60). The rectifier (20) generates a rectified supply voltage (VRS) based on an in-line voltage (VLN), and the converter driver (60) generates one or more driving voltages (VDR) to facilitate a conversion by the converter (50) of the rectified supply voltage (VRS) to a DC bus voltage (VDC) based on the driving voltage(s) (VDR). The converter (50) may include a transient voltage suppression device (52) to suppress the rectified supply voltage (VRS) in response to an abnormal line condition of the switch mode power supply (15), and the converter driver (60) may include a free-oscillating suppression device (61) to suppress the one or more driving voltages (VDR) in response to a free-oscillating condition of the converter driver (60).

Abstract: An electronic ballast with higher startup voltage includes converter with a switching circuit (40) responsive to a switching control signal (50) and operably connected to a DC bus (30); a DC controller (44) comparing a sensed DC bus voltage signal and a reference DC bus voltage signal to generate the switching control signal (50); and a startup adjustor operably connected to the DC controller (44) to adjust at least one of the sensed DC bus voltage signal and the reference DC bus voltage signal for a predetermined time at startup so that startup DC bus voltage is greater than steady state DC bus voltage.

Abstract: An electronic ballast with higher startup voltage includes converter with a switching circuit (40) responsive to a switching control signal (50) and operably connected to a DC bus (30); a DC controller (44) comparing a sensed DC bus voltage signal and a reference DC bus voltage signal to generate the switching control signal (50); and a startup adjustor operably connected to the DC controller (44) to adjust at least one of the sensed DC bus voltage signal and the reference DC bus voltage signal for a predetermined time at startup so that startup DC bus voltage is greater than steady state DC bus voltage.

Abstract: An anti-striation circuit employs an inverter topology including a pair of electronic switches (Q, M) that are switched between a conducting state and a nonconducting state in an alternating manner to apply an asymmetrical voltage waveform across one or more lamp (LP) to thereby control a flow of an asymmetrical current waveform (iacc) through lamps (LP). To eliminate, if not minimize, visible striations in the lamp(s) (LP), the impedances of an asymmetrical driver as connected to the control inputs (B, G) of the electronic switches (Q, M) may be unequal, and/or the impedances of an asymmetrical driver as connected to the current paths (C-E, D-S) of the electronic switches (Q, M) may be unequal. Additionally, the current gains of the electronic switches (Q, M) may be unequal, and a DC current may flow through the lamp(s) (LP).

Abstract: The present invention provides electronic switching for a bi-level fluorescent lamp fixture that allows power to be switched on and off to a group of lamps in a fixture when more or less illumination is needed in an area. The power can be switched without the need to power down the fixture when switching from high level with all lamps illuminated to a low level with only part of the lamps illuminated. The lamp current or frequency can be adjusted to save power when only part of the lamps are illuminated.

Abstract: The present invention provides electronic switching for a bi-level fluorescent lamp fixture that allows power to be switched on and off to a group of lamps in a fixture when more or less illumination is needed in an area. The power can be switched without the need to power down the fixture when switching from high level with all lamps illuminated to a low level with only part of the lamps illuminated. The lamp current or frequency can be adjusted to save power when only part of the lamps are illuminated.