Patents by Inventor Romi O. Mayder
Romi O. Mayder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8925193Abstract: A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, one atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.Type: GrantFiled: July 6, 2010Date of Patent: January 6, 2015Assignee: Advantest (Singapore) Pte LtdInventor: Romi O. Mayder
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Patent number: 8305098Abstract: A probe card assembly used to test electronic devices in an automated test equipment system. The probe card assembly includes a substrate having a plurality of through-holes contained therein and a plurality of electrical contact elements. Each of the plurality of electrical contact elements has characteristics of both a torsional beam and a cantilever beam design and is configured to scrub a test pad associated with the electronic device in two directions concurrently. The plurality of electrical contacts is configured to be magnetically aligned to the substrate. Each of the plurality of electrical contact elements is further configured to be removably adhered to the substrate thus allowing easy field replacement of individual electrical contact elements.Type: GrantFiled: April 25, 2008Date of Patent: November 6, 2012Assignee: Advantest (Singapore) Pte LtdInventor: Romi O. Mayder
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Patent number: 8269515Abstract: An electronic device for use with a probe head in automated test equipment includes first and second pluralities of semiconductor devices. The first plurality of semiconductor devices is arranged to form at least one driver arranged to couple to a device under test. The at least one driver is configured to transmit a signal to the at least one device under test. The second plurality of semiconductor devices is arranged to form at least one receiver arranged to couple to the device under test. The at least one receiver is configured to receive a signal from the at least one device under test. Each of the second plurality of semiconductor devices has a thickness less than about 300 ?m exclusive of any electrical interconnects. The at least one receiver is adapted to mount directly to the probe head.Type: GrantFiled: August 3, 2010Date of Patent: September 18, 2012Assignee: Advantest (Singapore) Pte LtdInventor: Romi O. Mayder
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Publication number: 20100301885Abstract: An electronic device for use with a probe head in automated test equipment includes first and second pluralities of semiconductor devices. The first plurality of semiconductor devices is arranged to form at least one driver arranged to couple to a device under test. The at least one driver is configured to transmit a signal to the at least one device under test. The second plurality of semiconductor devices is arranged to form at least one receiver arranged to couple to the device under test. The at least one receiver is configured to receive a signal from the at least one device under test. Each of the second plurality of semiconductor devices has a thickness less than about 300 ?m exclusive of any electrical interconnects. The at least one receiver is adapted to mount directly to the probe head.Type: ApplicationFiled: August 3, 2010Publication date: December 2, 2010Applicant: VERIGY (SINGAPORE) PTE. LTD.Inventor: Romi O. Mayder
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Publication number: 20100269336Abstract: A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, one atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.Type: ApplicationFiled: July 6, 2010Publication date: October 28, 2010Applicant: VERIGY (SINGAPORE) PTE. LTD.Inventor: Romi O. Mayder
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Patent number: 7768278Abstract: An electronic device for use with a probe head in automated test equipment. The device includes a plurality of semiconductor devices arranged to provide at least one driver/receiver pair where the driver portion of the driver/receiver pair is configured to transmit a signal to at least one device under test and the receiver portion of the driver/receiver pair is configured to receive a signal from the at least one device under test. Each of the plurality of semiconductor devices is fabricated using either a silicon-on-insulator (SOI) or metal-on-insulator (MOI) technology and has a thickness less than about 300 ?m exclusive of any electrical interconnects. The at least one driver/receiver pair is adapted to mount directly to the probe head.Type: GrantFiled: March 22, 2007Date of Patent: August 3, 2010Assignee: Verigy (Singapore) Pte. Ltd.Inventor: Romi O. Mayder
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Patent number: 7750650Abstract: A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, on atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.Type: GrantFiled: March 14, 2007Date of Patent: July 6, 2010Assignee: Verigy (Singapore) Pte. Ltd.Inventor: Romi O. Mayder
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Publication number: 20080265927Abstract: A probe card assembly used to test electronic devices in an automated test equipment system. The probe card assembly includes a substrate having a plurality of through-holes contained therein and a plurality of electrical contact elements. Each of the plurality of electrical contact elements has characteristics of both a torsional beam and a cantilever beam design and is configured to scrub a test pad associated with the electronic device in two directions concurrently. The plurality of electrical contacts is configured to be magnetically aligned to the substrate. Each of the plurality of electrical contact elements is further configured to be removably adhered to the substrate thus allowing easy field replacement of individual electrical contact elements.Type: ApplicationFiled: April 25, 2008Publication date: October 30, 2008Applicant: Silicon Test Systems, Inc.Inventor: Romi O. Mayder
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Publication number: 20080191683Abstract: An electronic device for use with a probe head in automated test equipment. The device includes a plurality of semiconductor devices arranged to provide at least one driver/receiver pair where the driver portion of the driver/receiver pair is configured to transmit a signal to at least one device under test and the receiver portion of the driver/receiver pair is configured to receive a signal from the at least one device under test. Each of the plurality of semiconductor devices is fabricated using either a silicon-on-insulator (SOI) or metal-on-insulator (MOI) technology and has a thickness less than about 300 ?m exclusive of any electrical interconnects. The at least one driver/receiver pair is adapted to mount directly to the probe head.Type: ApplicationFiled: March 22, 2007Publication date: August 14, 2008Applicant: SILICON TEST SYSTEMS, INC.Inventor: Romi O. Mayder
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Publication number: 20080100291Abstract: A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electricallly and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, on atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.Type: ApplicationFiled: March 14, 2007Publication date: May 1, 2008Applicant: SILICON TEST SYSTEMS, INC.Inventor: Romi O. Mayder
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Publication number: 20080100323Abstract: An interference device to communicate electrical signals from a probe card used to test electronic circuits. The interface device includes at least one interposer configured to electrically couple to the probe card and a plurality of mechanical springs mechanically coupled to the at least one interposer. Each of the plurality of mechanical springs is removably arranged such that one or more of the plurality of mechanical springs may be removed. A flexible circuit is electrically coupled to the plurality of mechanical springs. The flexible circuit is further configured to mechanically couple to the at least one interposer.Type: ApplicationFiled: March 14, 2007Publication date: May 1, 2008Applicant: SILICON TEST SYSTEMS, INC.Inventor: Romi O. Mayder
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Publication number: 20080099232Abstract: A method for forming and using a resulting patterned discrete section to interconnect a plurality of printed circuit boards having electrical contact pads. The patterned discrete section is comprised of one or more dielectric sheets having an exposed first surface and an exposed second surface and a plurality of electrically conductive compliant features on each of the two exposed surfaces. The plurality of electrically conductive compliant features are configured to electrically couple to the electrical contact pads on the plurality of printed circuit boards, thereby providing a discrete means to provide electrical coupling between the patterned discrete section and the plurality of printed circuit boards.Type: ApplicationFiled: March 26, 2007Publication date: May 1, 2008Applicant: SILICON TEST SYSTEMS, INC.Inventor: Romi O. Mayder
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Patent number: 7348791Abstract: An electronic switching apparatus for use in automated test equipment. The electronic switching apparatus includes a transconducting device having source and drain regions where at least one of the source and drain regions is configured to be coupled to a voltage source. A voltage comparison means is coupled to the transconducting device for determining a relative magnitude of voltage applied to the source and drain regions and a multiplexer has an input coupled to the voltage comparison means for selecting a higher of the relative magnitudes of voltage. A gate adder having an input is coupled to an output of the multiplexer and an output is coupled to a gate of the transconducting device. The gate adder is configured to add a fixed voltage to the higher of the relative magnitudes of voltage. A bulk adder having an input is coupled to an output of the multiplexer and an output is coupled to a bulk of the transconducting device.Type: GrantFiled: March 14, 2007Date of Patent: March 25, 2008Assignee: Silicon Test System, Inc.Inventor: Romi O. Mayder