Patents by Inventor Ron Coleman

Ron Coleman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050114560
    Abstract: An architecture is shown where an execution unit is tightly coupled to a shared, reconfigurable memory system. Sequence control signals drive a DMA controller and address generator to control the transfer of data from the shared memory to a bus interface unit (BIU). The sequence control signals also drive a data controller and address generator which controls transfer of data from the shared memory to an execution unit interface (EUI). The EUI is connected to the execution unit operates under control of the data controller and address generator to transfer vector data to and from the shared memory. The shared memory is configured to swap memory space in between the BIU and the execution unit so as to support continuous execution and I/O. A local fast memory is coupled to the execution unit. A local address generator controls the transfer of scalar data between the local fast memory and the execution unit.
    Type: Application
    Filed: October 21, 2004
    Publication date: May 26, 2005
    Applicant: Marger Johnson & McCollom, P.C.
    Inventors: Ron Coleman, Brent LeBack, Stuart Hawkinson, Richard Rubinstein
  • Patent number: 6895452
    Abstract: An architecture is shown where an execution unit is tightly coupled to a shared, reconfigurable memory system. Sequence control signals drive a DMA controller and address generator to control the transfer of data from the shared memory to a bus interface unit (BIU). The sequence control signals also drive a data controller and address generator which controls transfer of data from the shared memory to an execution unit interface (EUI). The EUI is connected to the execution unit operates under control of the data controller and address generator to transfer vector data to and from the shared memory. The shared memory is configured to swap memory space in between the BIU and the execution unit so as to support continuous execution and I/O. A local fast memory is coupled to the execution unit. A local address generator controls the transfer of scalar data between the local fast memory and the execution unit.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: May 17, 2005
    Assignee: Marger Johnson & McCollom, P.C.
    Inventors: Ron Coleman, Brent LeBack, Stuart Hawkinson, Richard Rubinstein
  • Patent number: D608945
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: January 26, 2010
    Inventors: Ron Coleman, Ronnie Watson
  • Patent number: D735412
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: July 28, 2015
    Inventor: Ron Coleman