Patents by Inventor Ron Pyke

Ron Pyke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11790147
    Abstract: Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include receiving, using a processor, an electronic design library including a plurality of design rules. Embodiments may include generating a routing graph, based upon, at least in part, the plurality of design rules, wherein the routing graph is a virtual representation of all of the available routing space for all routing layers associated with an electronic design. Embodiments may further include dynamically updating the routing graph at a graphical user interface, based upon, at least in part, a creation of a routing segment or a via at the graphical user interface.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: October 17, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hongzhou Liu, Rahaprian Premavathi Mudiarasan, Sandipan Ghosh, Hui Xu, Chris (Shyh-Chang) Lin, Joshua Baudhuin, Ron Pyke, Juno Lin, Allen You, Yu Liu, Jiulong Zhang, Thomas Richards
  • Patent number: 8302052
    Abstract: Disclosed are a method, a system, and a computer program product for implementing hotspot detection, repair, and optimization of an electronic circuit design, which, in some embodiments, defines, identifies criteria for hotspots/metrics or optimization objective function; performs the initial hotspot or metric prediction; identifies correction candidate(s); applies a correction candidate to the electronic circuit design; and determines whether the outcome of applying the correction candidate is acceptable. The method or the system identifies custom correction candidate(s) or custom command(s) and identifies one or more hints for the predicted hotspots or metrics; provides a single architecture to use a first model for hotspot identification/correction and a second model for design check; and provides the capability to apply a correction for a hotspot or metric, evaluate the effectiveness of the correction on the fly, and revert any changes made to the electronic circuit design by the correction.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Brian Lee, Srinivas Doddi, Ron Pyke, Taber Smith, Emmanuel Drege
  • Publication number: 20100324878
    Abstract: Disclosed are a method, a system, and a computer program product for implementing hotspot detection, repair, and optimization of an electronic circuit design, which, in some embodiments, defines, identifies criteria for hotspots/metrics or optimization objective function; performs the initial hotspot or metric prediction; identifies correction candidate(s); applies a correction candidate to the electronic circuit design; and determines whether the outcome of applying the correction candidate is acceptable. The method or the system identifies custom correction candidate(s) or custom command(s) and identifies one or more hints for the predicted hotspots or metrics; provides a single architecture to use a first model for hotspot identification/correction and a second model for design check; and provides the capability to apply a correction for a hotspot or metric, evaluate the effectiveness of the correction on the fly, and revert any changes made to the electronic circuit design by the correction.
    Type: Application
    Filed: June 23, 2009
    Publication date: December 23, 2010
    Applicant: Cadence Design Systems, Inc.
    Inventors: Brian LEE, Srinivas DODDI, Ron PYKE, Taber SMITH, Emmanuel DREGE