Patents by Inventor Ronald A. DePace

Ronald A. DePace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6945447
    Abstract: A chip or die attachment process and related apparatus, in which a desired quantity of solder (7 or 17) is dispensed onto each, in turn, of a number of desired locations on a substrate (4 or 18), and then an integrated-circuit chip (10) is precisely positioned at each location immediately after the solder is dispensed at that location. Hot gas heaters are used both to heat the solder (7 or 17) as it is dispensed onto the substrate (4 or 18), and to heat the integrated-circuit chip (10) and to reflow the solder beneath the chip. In one form of the invention, the solder is dispensed from a wire spool (1) and melted in position on the substrate (4). Alternatively, the solder is dispensed as a drop (16) from a liquid solder reservoir (13).
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: September 20, 2005
    Assignee: Northrop Grumman Corporation
    Inventors: Dean Tran, Salim Akbany, Maurice Lowery, Leon M. Singleton, Jr., Ronald A. DePace
  • Patent number: 6805786
    Abstract: A relatively simple and inexpensive process for plating precious alloyed metals, such as AuSn, AuSnIn, AgSn, AuIn and AgIn. Anodes are formed from each of the metal components in the alloy and disposed in a conducting solution. The mass of each metal components is determined by Faraday's law. The target is also disposed in the conducting solution. Plating current is independently applied to each anode. The plating is conducted under an ultraviolet light sources to optimize the process. The plating alloys can be used for various purposes including attaching a semiconductor die to a substrate. Since the process does not involve exposure of the semiconductor die to a relatively high temperature for a relatively long time, the process does not pose a risk of contamination of the semiconductor by the adhesive or wax used to hold the die in place on the carrier during processing.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: October 19, 2004
    Assignee: Northrop Grumman Corporation
    Inventors: Dean Tran, Salim Akbany, Ronald A. DePace, William L. Jones, Roosevelt Johnson
  • Publication number: 20040055889
    Abstract: A relatively simple and inexpensive process for plating precious alloyed metals, such as AuSn, AuSnIn, AgSn, AuIn and AgIn. Anodes are formed from each of the metal components in the alloy and disposed in a conducting solution. The mass of each metal components is determined by Faraday's law. The target is also disposed in the conducting solution. Plating current is independently applied to each anode. The plating is conducted under an ultraviolet light sources to optimize the process. The plating alloys can be used for various purposes including attaching a semiconductor die to a substrate. Since the process does not involve exposure of the semiconductor die to a relatively high temperature for a relatively long time, the process does not pose a risk of contamination of the semiconductor by the adhesive or wax used to hold the die in place on the carrier during processing.
    Type: Application
    Filed: September 24, 2002
    Publication date: March 25, 2004
    Inventors: Dean Tran, Salim Akbany, Ronald A. DePace, William L. Jones, Roosevelt Johnson
  • Publication number: 20030226877
    Abstract: A chip or die attachment process and related apparatus, in which a desired quantity of solder (7 or 17) is dispensed onto each, in turn, of a number of desired locations on a substrate (4 or 18), and then an integrated-circuit chip (10) is precisely positioned at each location immediately after the solder is dispensed at that location. Hot gas heaters are used both to heat the solder (7 or 17) as it is dispensed onto the substrate (4 or 18), and to heat the integrated-circuit chip (10) and to reflow the solder beneath the chip. In one form of the invention, the solder is dispensed from a wire spool (1) and melted in position on the substrate (4). Alternatively, the solder is dispensed as a drop (16) from a liquid solder reservoir (13).
    Type: Application
    Filed: June 5, 2002
    Publication date: December 11, 2003
    Inventors: Dean Tran, Salim Akbany, Maurice Lowery, Leon M. Singleton, Ronald A. DePace
  • Patent number: 6365442
    Abstract: A method of making a micro-miniature switch device (10), which has at least one member (68) movable relative to a substrate (12) upon which the device is provided, includes providing a layer of sacrificial non-photolithography material upon a stratum connected to the substrate. A template is provided via photolithographing step that uses a photoresist material upon a stratum connected to the substrate. A layer is provided to include at least a portion of the movable member. The photoresist material and the sacrificial non-photolithography material are removed using photoresist developer. Preferably, at least two photolithography process steps utilize a single photolithographic mask. Also preferably, substrate material is removed to create a recess and at least one channel into the substrate, wherein the channel intersects the recess. At least a portion of the movable member is provided at a location within the recess and at least a portion of the movable member is provided at a location within the channel.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: April 2, 2002
    Assignee: TRW Inc.
    Inventors: Dean Tran, John Joseph Berenz, Luis M. Rochin, Thomas J. Roth, Ronald A. DePace
  • Patent number: 6291908
    Abstract: A micro-miniature switch apparatus (10) includes a substrate (12) having a surface (14) with first and second channels (16, 18) extending from the surface (14) into the substrate (12). The first and second channels (16, 18) are spaced apart from each other, with a channel axis (20) extending longitudinally through the first and second channels (16, 18). A body (68) that is movable relative to the substrate (12) includes two arms (70, 72). Each of the arms (70, 72) extends into one of the first and second channels (16, 18) to support the body (68) for movement relative to the substrate (12) between first and second electrical conditions of the switch apparatus (10).
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: September 18, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, John Joseph Berenz, Luis M. Rochin, Thomas J. Roth, Ronald A. DePace
  • Patent number: 5491304
    Abstract: A connector is disclosed for electrically coupling groups of contact points formed on a first and second electronic circuit chip. The connector is constructed by applying a layer of dielectric material to a planar electrically conductive base, lithographically printing a pattern onto the dielectric material, etching the pattern and creating a plurality of wells extending through the dielectric material and a matching plurality of cavities in the surface of the base, and electroplating the pattern and filling the wells with an electrically conductive electroplate material. The electroplate thereby forms a plurality of conductive members, each extending through the dielectric material. The base is then removed from the dielectric material, thereby forming a connector board having the conductive members extending therethrough for electrically coupling the first and second groups of contact points on the circuit chips.
    Type: Grant
    Filed: September 29, 1994
    Date of Patent: February 13, 1996
    Assignee: TRW Inc.
    Inventors: James C. Kei Lau, Richard P. Malmgren, Ronald A. DePace
  • Patent number: 5430257
    Abstract: An apparatus for mounting a waveguide window or conduction member into a housing such that a smooth gradient of the coefficient of thermal expansion exists between the housing and the window or conduction member, thereby reducing the internal stress which results from ambient temperature variations. The apparatus comprises a frame member for mounting a feedthrough member into a housing. The frame member includes a buffer section having a plurality of sections, each section having a material which progressively varies the coefficient of thermal expansion. The frame member further includes additional stress relief features and structural elements facilitating manufacture and assembly of the apparatus.
    Type: Grant
    Filed: August 12, 1992
    Date of Patent: July 4, 1995
    Assignee: TRW Inc.
    Inventors: James C.-K. Lau, Kenneth Lui, James A. Hathaway, Ronald A. DePace
  • Patent number: 5376226
    Abstract: A connector is disclosed for electrically coupling groups of contact points formed on a first and second electronic circuit chip. The connector is constructed by applying a layer of dielectric material to a planar electrically conductive base, lithographically printing a pattern onto the dielectric material, etching the pattern and creating a plurality of wells extending through the dielectric material and a matching plurality of cavities in the surface of the base, and electroplating the pattern and filling the wells with an electrically conductive electroplate material. The electroplate thereby forms a plurality of conductive members, each extending through the dielectric material. The base is then removed from the dielectric material, thereby forming a connector board having the conductive members extending therethrough for electrically coupling the first and second groups of contact points on the circuit chips.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: December 27, 1994
    Assignee: TRW Inc.
    Inventors: James C. K. Lau, Richard P. Malmgren, Ronald A. DePace