Abstract: The present invention relates to methods for reducing testosterone levels by reduction of luteinizing hormone (LH) or independent of LH levels in a male subject and methods of treating, suppressing, reducing the incidence, reducing the severity, or inhibiting prostate cancer, advanced prostate cancer, and castration-resistant prostate cancer (CRPC) and palliative treatment of prostate cancer, advanced prostate cancer and castration-resistant prostate cancer (CRPC). The compounds of this invention suppress free or total testosterone levels to castrate levels which may be used to treat prostate cancer, advanced prostate cancer, and CRPC without causing bone loss, decreased bone mineral density, increased risk of bone fractures, increased body fat, hot flashes and/or gynecomastia.

Abstract: The present invention relates to methods for reducing testosterone levels by reduction of luteinizing hormone (LH) or independent of LH levels in a male subject and methods of treating, suppressing, reducing the incidence, reducing the severity, or inhibiting prostate cancer, advanced prostate cancer, and castration-resistant prostate cancer (CRPC) and palliative treatment of prostate cancer, advanced prostate cancer and castration-resistant prostate cancer (CRPC). The compounds of this invention suppress free or total testosterone levels to castrate levels which may be used to treat prostate cancer, advanced prostate cancer, and CRPC without causing bone loss, decreased bone mineral density, increased risk of bone fractures, increased body fat, hot flashes and/or gynecomastia.

Abstract: A method for conversion between a decimal floating-point number and an order-preserving format has been disclosed. The method encodes numbers in the decimal floating-point format into a format which preserves value ordering. This encoding allows for fast and direct string comparison of two values. Such an encoding provides normalized representations for decimal floating-point numbers and supports type-insensitive comparisons. Type-insensitive comparisons are often used in database management systems, where the data type is not specified for values to compare. In addition, the original decimal floating-point format can be recovered from the order-preserving format.

Abstract: A time synchronization apparatus, method and system are provided. In one aspect, the apparatus comprises at least a time of day clock, a first port operable to receive at least first time information using a first time protocol, a second port operable to receive at least second time information using a second time protocol, a third port operable to receive at least a timing signal, and a time stamp register operable to at least capture current value of the time of day clock upon receipt of the timing signal from the third port or the first time information from the first port or combination thereof.

Abstract: A stackable drywall tape and joint compound dispenser is disclosed. The dispenser includes a tape holder and a reservoir for storing drywall joint compound, wherein when the dispenser is placed on another dispenser of substantially the same configuration, at least one of the respective tape holders and reservoirs nest with one another.

Abstract: Custom-engineered glucose oxidase fusion proteins, prepared by recombinant DNA techniques, are employed in a chip-based amperometric immunosensor. This on-chip assay provides quantitative measurement of analyte concentration in any fluid, including all body fluids. The system is designed to facilitate ease in swapping of molecular recognition components and can be rapidly adapted to measure the concentration of any peptide or protein for which a monoclonal antibody is available.

Abstract: Custom-engineered glucose oxidase fusion proteins, prepared by recombinant DNA techniques, are employed in a chip-based amperometric immunosensor. This on-chip assay provides quantitative measurement of analyte concentration in any fluid, including all body fluids. The system is designed to facilitate ease in swapping of molecular recognition components and can be rapidly adapted to measure the concentration of any peptide or protein for which a monoclonal antibody is available.

Abstract: A computer system having multiple floating point modes and common instructions for each mode in order to implement operations in a mode independent manner. A computer system includes two floating point modes supported by a common set of instructions for implementing operations, said instructions thereby being mode independent. The computer system includes a means for storing information for specifying the current floating point mode; and a floating point unit adapted to execute any one instruction from among the common set of instructions in accordance with the stored rounding mode and the operation associated with said instruction, thereby providing for mode independent operation. In an embodiment of the present invention, the floating point mode is either binary floating point or hexadecimal floating point.

Abstract: A system and method for providing an interruptible remainder instruction that can produce a quotient as well as a remainder. Remainders are computed through an iterative procedure. This procedure is carried out in a computer system's hardware by following a series of steps, the series being interruptible at any point. Each step reduces the magnitude of the dividend until the final remainder can be obtained. In the intermediate steps, the sign of the new (smaller in magnitude) dividend is kept the same as the sign of the original dividend, and the value Ni (which can be considered part of the quotient) is rounded toward zero. Only in the last step must the sign of the operands be considered and directed rounding be performed. Throughout the remainder operation, the partial quotients can be saved so that upon completion, not only has the remainder been computed, but so has the quotient.

Abstract: A computer system having a default floating point rounding mode that may be overridden by a rounding mode designated by an instruction. The current machine rounding mode is stored in a register, and an instruction includes a field for specifying whether rounding should be performed according to the current rounding mode or according to another rounding mode during execution thereof.

Abstract: A computer system having multiple floating point modes and common instructions for each mode in order to implement operations in a mode independent manner. A computer system includes two floating point modes supported by a common set of instructions for implementing operations, said instructions thereby being mode independent. The computer system includes a means for storing information for specifying the current floating point mode; and a floating point unit adapted to execute any one instruction from among the common set of instructions in accordance with the stored rounding mode and the operation associated with said instruction, thereby providing for mode independent operation. In an embodiment of the present invention, the floating point mode is either binary floating point or hexadecimal floating point.

Abstract: A system and method for providing an interruptible remainder instruction that can produce a quotient as well as a remainder. Remainders are computed through an iterative procedure. This procedure is carried out in a computer system's hardware by following a series of steps, the series being interruptible at any point. Each step reduces the magnitude of the dividend until the final remainder can be obtained. In the intermediate steps, the sign of the new (smaller in magnitude) dividend is kept the same as the sign of the original dividend, and the value Ni (which can be considered part of the quotient) is rounded toward zero. Only in the last step must the sign of the operands be considered and directed rounding be performed. Throughout the remainder operation, the partial quotients can be saved so that upon completion, not only has the remainder been computed, but so has the quotient.

Abstract: The method of preparing 2,4-diamino benzyl pyrimidines which comprises the step of reacting an N-aryl (substituted or unsubstituted)-.beta.-amino-.alpha.-benzylacrylonitrile with guanidine.

Abstract: A unique control circuit that maintains the addressability to an invalidated page frame until execution is completed for all current instructions in all CPUs of a multiprocessing system which uses demand-paging and virtual addressing.A support method is also disclosed which provides an asynchronous sequence of operations for each CPU in the multiprocessing system to maintain the page in the invalidated page frame available to all CPUs and until their current instruction execution is completed. The last CPU to complete its execution moves the page, if modified, out of the page frame.

Abstract: Circuits and method for synchronizing and checking a plurality of time-of-day (TOD) clocks in a multiprocessing system. Unique hardware synchronizes the low order part of the TOD clocks and a unique method synchronizes the high order part in the same clocks by using carry pulses derived from an intermediate bit position in each TOD clock. The carry pulses from all TOD clocks are combined in an OR circuit with each clock to provide common carry pulses for synchronizing each TOD clock in the system.