Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: An Integrated Circuit (IC) for an RFID tag includes two electrically isolated antenna ports for connecting to two antennas, with each antenna port configured to operate at a different frequency range and/or with a different communications protocol. In some embodiments a rectifier coupled to one of the antenna ports is operable to extract energy from an electromagnetic field in a first frequency range, and a demodulator coupled to the other antenna port is operable to demodulate symbols according to an RFID protocol in a second frequency range. In some embodiments the frequency ranges are disjoint, intersecting, or one is a proper subset of the other. In some embodiments each port is coupled to its own rectifier and/or its own modulator and/or its own demodulator. In some embodiments an RFID tag includes the IC and two antennas, each operable in one of the two frequency ranges.

Abstract: An RFID tag tuning circuit may be capable of adjusting the impedance matching between an RFID integrated circuit (IC) and an antenna on an RFID tag to increase the amount of power that the IC can extract from an incident RF wave. The tuning circuit switches a variable impedance coupling the antenna and the IC between several different impedance settings, where each impedance setting differs from an adjacent impedance setting by a respective impedance step size and at least one impedance step size has a different value than another impedance step size. The tuning circuit may switch the variable impedance by incrementing through a counter, decrementing through the counter, or performing some search algorithm. The tuning circuit may also initialize the variable impedance based on a default impedance setting or a random impedance setting derived from a random counter.

Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: A tuning circuit in an RFID tag may be used to match antenna and integrated circuit (IC) impedances to maximize the efficiency of IC power extraction from an incident RF wave. The tuning circuit, which requires less power to operate than the IC, adjusts a variable impedance to improve the impedance matching between the IC and the tag antenna and thereby increase the IC power extraction efficiency. The IC may begin operating according to a protocol when it extracts sufficient power from the RF wave or when an optimal impedance matching and power transfer is achieved.

Abstract: An assembly having an RFID integrated circuit (IC), a nonconductive repassivation layer on a surface of the IC and confined within a perimeter of the surface, and a conductive redistribution layer on the repassivation layer and confined within the perimeter of the surface may be provided. At least a first portion of the redistribution layer may be electrically connected to the IC through a first opening in the repassivation layer. Furthermore, a substrate having a first antenna terminal may be provided, and a second opening may be formed in a nonconductive barrier present on at least one of the first antenna terminal and the first portion of the redistribution layer with an etchant. The first opening and the second opening may be nonoverlapping. The assembly may be attached to the substrate with an adhesive.

Abstract: Radio Frequency Identification (RFID) tags are provided, along with apparatuses and methods for making. In some embodiments, the RFID tags include an RFID tag chip that is attached to an inlay and/or a strap. The inlay or strap has one or more contact bumps formed thereon. In some of these embodiments, the RFID tag chip includes pads for electrical contacts, but not chip-bumps, thanks to the contact bump.

Abstract: A Schottky junction diode device having improved performance and a multiple well structure is fabricated in a conventional CMOS process. A substrate including a material doped to a first conductivity type is formed. A first well is disposed over the substrate. The first well includes a material doped differently, such as to a second conductivity type opposite that of the first conductivity type. A second well is disposed within the first well. A region of metal-containing material is disposed in the second well to form a Schottky junction at an interface between the region of metal-containing material and the second well. In one embodiment, a second well contact is disposed in a portion of the second well.

Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: Embodiments are directed to a Radio Frequency Identification (RFID) integrated circuit (IC) having a first circuit block electrically coupled to first and second antenna contacts. The first antenna contact is disposed on a first surface of the IC and the second antenna contact is disposed on a second surface of the IC different from the first surface. The first and second antenna contacts are electrically disconnected from each other.

Abstract: RFID tags are assembled through affixing an antenna to an integrated circuit (IC) by forming one or more capacitors coupling the antenna and the IC with the dielectric material of the capacitor(s) including a non-conductive covering layer of the IC, a non-conductive covering layer of the antenna such as an oxide layer, and/or an additionally formed dielectric layer. Top and bottom plates of the capacitor(s) are formed by the antenna traces and one or more patches on a top surface of the IC.

Abstract: Radio Frequency Identification (RFID) tags are provided, along with apparatuses and methods for making. In some embodiments, the RFID tags include an RFID tag chip that is attached to an inlay and/or a strap. The inlay or strap has one or more contact bumps formed thereon. In some of these embodiments, the RFID tag chip includes pads for electrical contacts, but not chip-bumps, thanks to the contact bump.

Abstract: Apparatus and method for generating a rectified output signal in a RFID tag from first and second alternating signals. A dual-terminal rectifier device has first and second input terminals to which the first and second alternating signals are applied, and further has a gate configured to form a conductive channel to electrically couple the first and second input terminals to the output terminal in response to a gate voltage. The dual-terminal rectifier device is configured to rectify a combination of the alternating input signals applied to the input terminals of the semiconductor device to generate a rectified output signal at an output terminal.

Abstract: The present disclosure provides a power rectifier for a Radio Frequency Identification tag circuit. The rectifier is constructed from a pair of complementary MOS transistors. Gates of the transistors have predetermined voltages applied to them. The applied voltages bias the transistors to near their active operating region. During the same time additional control signals are applied to the gates of the transistors, the control signals are synchronous, but out of phase, with each other.

Abstract: An Integrated Circuit (IC) for an RFID tag contains at least two demodulators, each having an RF input port configured to receive and demodulate an RF input signal, with one or more of the RF inputs being a differential signal, and with at least two of the RF input ports electrically isolated from each other. The RFID IC contains two or more envelope detectors for recovering analog modulation envelope signals from the RF signals, and one or more slicers to convert the modulation envelopes to at least one digital signal. The analog signals from the two envelope detectors may be first combined, then converted to a digital signal. Alternatively, the analog modulation envelopes may be first converted to digital signals then combined in a digital combiner. Alternatively, the analog modulation envelopes may be converted to separate digital signals without being combined.

Abstract: Apparatus and systems may include integrated circuits for use with Radio Frequency Identification (RFID) tags having an antenna structure with at least three coupling ends. The integrated circuits may include three or more nodes corresponding respectively to the at least three coupling ends, and a modulator switch to receive a single modulator switching signal input. Methods may include those used to form and operate such circuits. Additional apparatus, systems, and methods are disclosed.

Abstract: A system and method for generating a rectified signal in a RFID tag. An alternating signal is received by the RFID tag, and a first phase of the alternating signal is coupled to a gate and to a first non-controlling terminal of a first switching transistor. The non-controlling terminal of the first switching transistor is one of a source and a drain of the first switching transistor. A first bias voltage is applied between the first non-controlling terminal and the gate of the first switching transistor and a rectified voltage is received between the first non-controlling terminal and a second non-controlling terminal of the first switching transistor.

Abstract: A precursor for a Radio Frequency Identification (RFID) tag includes a conductive lead frame with at least three segments, an RFID Integrated Circuit (IC) with at least two antenna terminals, and at least two jumpers. The RFID IC is mounted on at least one of the segments. The antenna terminals are electrically coupled to at least two of the segments, and the jumpers electrically couple the segments such that the coupled segments form a two-turn coil between the antenna terminals of the RFID IC.