Abstract: Tracing a short as a shortest path of explicit VLSI design component instances between two VLSI design component instances with different net names in a hierarchical design is a non-hierarchical problem. The method described in this document computes a shortest path of VLSI design leaf component instances containing at least one of the leaf design components causing the sort. To avoid exceeding available storage, the non-hierarchical instance information maintained during the process is pruned optimally. To achieve feasible performance, two methods to find “good” starting points are provided, based on geometrical distribution or based on connectivity information from the net build (if available).

Abstract: Tracing a short as a shortest path of explicit Very Large Scale Integrated (VLSI) circuit design component instances between two VLSI design component instances with different net names in a hierarchical design is a non-hierarchical problem. The method described in this document computes an approximation for the shortest path of VLSI design component instances taking full advantage of the hierarchical structure of the design. For the resulting path it is guaranteed that it contains at least one of the VLSI design component instances that cause the short. For each individual cell a Shortest Path Search (SPS) can be applied. In comparison to prior flat searches, which required unfeasible amounts of storage and computation time on large nets, this solution requires asymptotically not more storage and computation time than other forms of hierarchical VLSI checking tasks.