Patents by Inventor Ronald Allen Norell

Ronald Allen Norell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6581486
    Abstract: An integrated circuit tester includes a fail-safe mechanism for moving an integrated circuit chip between an initial position where the integrated circuit chip is inserted into the tester, and a test position where the integrated circuit chips is actually tested. This fail-safe mechanism includes a motor and a shaft which the motor rotates to move the integrated circuit chip. An electronic control circuit can be included to automatically stop the motor when the integrated circuit reaches its initial position, or its test position; but if the control circuit fails to operate properly, then damage to the integrated circuit tester is prevented by the fail-safe mechanism.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: June 24, 2003
    Assignee: Unisys Corporation
    Inventors: David John Ditri, Ronald Allen Norell, James Mason Brafford
  • Patent number: 6271048
    Abstract: An integrated circuit package is processed by a grinding step, a dissolving step, and a disintegrating step. The grinding step grinds an IC-chip completely off of a substrate, and it also grinds a first portion of a filler layer and a first portion of a set of solder balls which attach the IC-chip to the substrate. This leaves a partial filler layer and partial solder balls on the substrate. The dissolving step dissolves the partial filler layer off of the substrate after the grinding step; and the disintegration step disintegrates at least part of each partial solder ball by subjecting the partial solder balls on the substrate to ultrasonic vibration after the dissolving step. These steps leave the substrate with small solder mounds that can be easily attached to another IC-chip with another set of solder balls.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: August 7, 2001
    Assignee: Unisys Corporation
    Inventors: Kenneth Patrick Reilich, Ronald Allen Norell, Elvira Widyani Preecha, Joel Elwood Wing, Lorraine Lo-Lan Wing
  • Patent number: 6105851
    Abstract: I/O columns are cast on the I/O pads of an electronic component via a process which uses a template that has a set of alignment holes, and a set of casting holes, and an additional set of pin holes that are interspersed with the casting holes. Initially, the template is placed in a fixture such that the casting holes align with the I/O pads of the electronic component. Next, the template is covered with a mask that exposes all of the casting holes but blocks all of the pin holes. Then the exposed casting holes in the template are filled with a solid metallic material. Next the mask is removed, and the metallic material in the casting holes is melted and re-solidified to thereby form the I/O columns on the I/O pads. Then the electronic component with its I/o columns is separated from the template by pushing on the component with pins that are passed through the pin holes in the template.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: August 22, 2000
    Inventors: Ronald Allen Norell, Kenneth Walter Economy
  • Patent number: 5918516
    Abstract: A method of cutting input/output columns on an electronic component includes the steps of: providing a shear plate which has a thickness that is less than the length of the columns and which has respective holes for receiving all of the columns; inserting the columns into the holes until a portion of the columns extend past the shear plate; placing a blade, with a cutting edge, at an acute angle against the shear plate such that only the cutting edge of the blade touches the shear plate; and, sliding the cutting edge of the blade against shear plate and through the portion of the columns which extend past the shear plate, while keeping the blade at the acute angle. With this method, crater-like voids and burrs on the cut ends of the columns are eliminated.
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: July 6, 1999
    Assignee: Unisys Corporation
    Inventors: Ronald Allen Norell, Kenneth Walter Economy
  • Patent number: 5839191
    Abstract: Solder balls are placed onto multiple I/O pads of an integrated circuit package by the steps of a) providing a template with a channel which has multiple openings on a surface of the template that match the pattern of the I/O pads; b) pouring a plurality of the solder balls onto the surface of the template; c) vibrating the template and thereby seating a respective solder ball in each of the template openings; d) turning the template over, after the vibrating step and while a vacuum is applied to the channel, to remove excess solder balls from the template; and e) removing the vacuum from the channel when the solder balls on the turned over template are aligned to the I/O pads of the integrated circuit package. Due to the vibrating step, the solder balls settle in the template openings in a position where vacuum leaks past the solder balls become minimized; and that stops the solder balls from dropping out of the template openings when the template is turned over.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: November 24, 1998
    Assignee: Unisys Corporation
    Inventors: Kenneth Walter Economy, Ronald Allen Norell, Richard Leigh Bumann
  • Patent number: 5816481
    Abstract: Multiple I/O pads are arranged in a pattern on a surface of an integrated circuit package, and an obstruction in the package prevents a planer solder flux mask from lying flat on the surface around the I/O pads. Such an obstruction can, for example, be a lid in the package which projects above the I/O pads, or it can be an encapsulant which covers a chip in the package and projects above the I/O pads. Despite the presence of the obstruction, solder flux is dispensed on the I/O pads of the integrated circuit package by the steps of --a) providing a pin block that has a base from which multiple pins project, and the ends of the pins match the pattern of the I/O pads; b) coating the ends of the pins with a solder flux; and, c) transferring a portion of the solder flux from the ends of the pins to the I/O pads by temporarily touching the coated ends of the pins against the I/O pads.
    Type: Grant
    Filed: January 24, 1997
    Date of Patent: October 6, 1998
    Assignee: Unisys Corporation
    Inventors: Kenneth Walter Economy, Ronald Allen Norell, Richard Leigh Bumann
  • Patent number: 5724229
    Abstract: A pressure-mountable, electro-mechanical assembly includes a housing which holds an integrated circuit chip in an open cavity; and, the housing has conductors that connect the chip to a pattern of metal pads on an exterior surface of the housing. A lid lies on the exterior surface of the housing, covers the cavity, and has terminal holes that match and expose the pattern of metal pads. Respective conductive springs are held in the terminal holes, contact the metal pads, and project from the lid. This lid operates as both a protective cover for the chip and a carrier for the springs.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: March 3, 1998
    Assignee: Unisys Corporation
    Inventors: Jerry Ihor Tustaniwskyi, Leonard Harry Alton, Ronald Jack Kuntz, Ronald Allen Norell