Patents by Inventor Ronald Anthony Decker

Ronald Anthony Decker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230253183
    Abstract: In one embodiment, an impedance matching network includes a variable reactance circuit having fixed reactance components and corresponding switching circuits. Each switching circuit includes a diode and a driver circuit. The driver circuit includes, coupled in series, a biasing current source positioned to provide a bias current to bias the diode, a first switch, a second switch, and a resistor. For each diode of each switching circuit, the control circuit is configured to receive a value related to a voltage drop on the resistor and, based on the value related to the voltage drop, adjust the bias current being provided by the biasing current source.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 10, 2023
    Inventors: Anton Mavretic, Ian M. Costanzo, Ronald Anthony Decker
  • Publication number: 20230215696
    Abstract: In one embodiment, a system includes an RF source and an RF impedance matching circuit receiving RF power from the RF source. The matching circuit includes at least one variable reactance element, a sensor operably coupled to a component of the matching circuit, and a control circuit. The control circuit receives a signal from the sensor indicative of a parameter value. Upon determining the parameter value meets a first predetermined condition, the control circuit transmits a control signal to the RF source causing the RF source to carry out a power control scheme. The power control scheme causes the RF source to reduce or maintain the RF power without turning off the RF power.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventors: Ronald Anthony DECKER, Imran Ahmed BHUTTA
  • Patent number: 11631570
    Abstract: In one embodiment, an impedance matching network includes a variable reactance circuit providing a variable capacitance or inductance. The variable reactance circuit includes reactance components and corresponding switching circuits. Each of the switching circuits includes a diode and a driver circuit to switch the diode. The driver circuit includes first and second switches coupled in series. A first driver is coupled to the first switch, a second driver is coupled to the second switch, and a third driver is coupled to the first and second drivers. The third driver provides a first signal to the first driver, and a second signal to the second driver. In providing the signals, the third driver increases and decreases a duration of a dead time between (a) driving the first driver on and the second driver off, or (b) driving the second driver on and the first driver off.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: April 18, 2023
    Inventors: Anton Mavretic, Ian M. Costanzo, Ronald Anthony Decker
  • Patent number: 11342160
    Abstract: In one embodiment, an RF impedance matching network for a plasma chamber is disclosed. The matching network includes an electronically variable capacitor (EVC) comprising discrete capacitors, each discrete capacitor having a corresponding switching circuit for switching in and out the discrete capacitor to alter a total capacitance of the EVC. Each switching circuit includes a diode operably coupled to the discrete capacitor to cause the switching in and out of the discrete capacitor, and a filter circuit parallel to the diode, the filter comprising a filtering capacitor in series with an inductor.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: May 24, 2022
    Inventors: Michael Gilliam Ulrich, Ronald Anthony Decker
  • Patent number: 11120971
    Abstract: In one embodiment, the present disclosure is directed to a method for performing diagnostics on a matching network that utilizes an electronically variable capacitor (EVC). According to the method, all the discrete capacitors of the EVC are switched out. At a first node, a parameter associated with a current flowing between a power supply and one or more of the switches of the discrete capacitors is measured. The method then switches in, one at a time, each discrete capacitor of the EVC. Upon the switching in of each discrete capacitor, the method remeasures the parameter at the first node and determines whether a change to the parameter at the first node is within a predetermined range to determine whether the corresponding switch, driver circuit, or filter of the discrete capacitor most recently switch in has failed.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 14, 2021
    Inventors: Chingping Huang, Michael Gilliam Ulrich, Tomislav Lozic, Ronald Anthony Decker, Imran Ahmed Bhutta, Bala Kandampalayam
  • Patent number: 11101110
    Abstract: In one embodiment, the present disclosure may be directed to an impedance matching network that includes an electronically variable capacitor (EVC). The EVC includes discrete capacitors and corresponding switches, each switch configured to switch in and out one of the discrete capacitors to alter a capacitance of the EVC. The switches are operably coupled to a power supply providing a blocking voltage to the switches. A control circuit determines a blocking voltage value of the power supply. Upon determining the blocking voltage value is at or below a predetermined first level, the control circuit causes a limited altering of the capacitance of the EVC, the limited altering limiting the number or type of discrete capacitors to switch in or out based on the extent to which the blocking voltage value is at or below the first level.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: August 24, 2021
    Inventors: Imran Ahmed Bhutta, Ronald Anthony Decker, Michael Gilliam Ulrich, Bala Kandampalayam
  • Publication number: 20210210311
    Abstract: In one embodiment, an impedance matching network includes a variable reactance circuit providing a variable capacitance or inductance. The variable reactance circuit includes reactance components and corresponding switching circuits. Each of the switching circuits includes a diode and a driver circuit to switch the diode. The driver circuit includes first and second switches coupled in series. A first driver is coupled to the first switch, a second driver is coupled to the second switch, and a third driver is coupled to the first and second drivers. The third driver provides a first signal to the first driver, and a second signal to the second driver. In providing the signals, the third driver increases and decreases a duration of a dead time between (a) driving the first driver on and the second driver off, or (b) driving the second driver on and the first driver off.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 8, 2021
    Inventors: Anton Mavretic, Ian M. Costanzo, Ronald Anthony Decker
  • Publication number: 20200343076
    Abstract: In one embodiment, the present disclosure may be directed to an impedance matching network that includes an electronically variable capacitor (EVC). The EVC includes discrete capacitors and corresponding switches, each switch configured to switch in and out one of the discrete capacitors to alter a capacitance of the EVC. The switches are operably coupled to a power supply providing a blocking voltage to the switches. A control circuit determines a blocking voltage value of the power supply. Upon determining the blocking voltage value is at or below a predetermined first level, the control circuit causes a limited altering of the capacitance of the EVC, the limited altering limiting the number or type of discrete capacitors to switch in or out based on the extent to which the blocking voltage value is at or below the first level.
    Type: Application
    Filed: July 10, 2020
    Publication date: October 29, 2020
    Inventors: Imran Ahmed BHUTTA, Ronald Anthony DECKER, Michael Gilliam ULRICH, Bala KANDAMPALAYAM
  • Publication number: 20200126765
    Abstract: In one embodiment, an RF impedance matching network for a plasma chamber is disclosed. The matching network includes an electronically variable capacitor (EVC) comprising discrete capacitors, each discrete capacitor having a corresponding switching circuit for switching in and out the discrete capacitor to alter a total capacitance of the EVC. Each switching circuit includes a diode operably coupled to the discrete capacitor to cause the switching in and out of the discrete capacitor, and a filter circuit parallel to the diode, the filter comprising a filtering capacitor in series with an inductor.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 23, 2020
    Inventors: Michael Gilliam ULRICH, Ronald Anthony DECKER
  • Publication number: 20200083022
    Abstract: In one embodiment, the present disclosure is directed to a method for performing diagnostics on a matching network that utilizes an electronically variable capacitor (EVC). According to the method, all the discrete capacitors of the EVC are switched out. At a first node, a parameter associated with a current flowing between a power supply and one or more of the switches of the discrete capacitors is measured. The method then switches in, one at a time, each discrete capacitor of the EVC. Upon the switching in of each discrete capacitor, the method re-measures the parameter at the first node and determines whether a change to the parameter at the first node is within a predetermined range to determine whether the corresponding switch, driver circuit, or filter of the discrete capacitor most recently switch in has failed.
    Type: Application
    Filed: November 15, 2019
    Publication date: March 12, 2020
    Inventors: Chingping HUANG, Michael Gilliam ULRICH, Tomislav LOZIC, Ronald Anthony DECKER, Imran Ahmed BHUTTA, Bala KANDAMPALAYAM
  • Patent number: 10340879
    Abstract: In one embodiment, an impedance matching network is disclosed that includes a first circuit comprising a first variable component providing a first variable capacitance or inductance, and a second circuit comprising a second variable component providing a second variable capacitance or inductance. Each of the first circuit and the second circuit includes plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance. Each of the plurality of switching circuits includes a diode and a driver circuit configured to switch the diode. The driver circuit includes a first switch, a second switch coupled in series with the first switch, and a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: July 2, 2019
    Inventors: Anton Mavretic, Ian M. Costanzo, Ronald Anthony Decker
  • Publication number: 20180076788
    Abstract: In one embodiment, the invention may be an impedance matching network including an input configured to operably couple to a radio frequency source, an output configured to operably couple to a load, and a first variable capacitor. The matching network may further include an inductor formed from a heat pipe that is wound in a three-dimensional shape. A first heat sink may be coupled adjacent to a first end of the heat pipe, and a second heat sink may be coupled adjacent to a second, opposite end of the heat pipe.
    Type: Application
    Filed: November 17, 2017
    Publication date: March 15, 2018
    Inventors: Ronald Anthony Decker, Dwight Jonathan Tucci, Michael Gilliam Ulrich
  • Publication number: 20180041183
    Abstract: In one embodiment, an impedance matching network is disclosed that includes a first circuit comprising a first variable component providing a first variable capacitance or inductance, and a second circuit comprising a second variable component providing a second variable capacitance or inductance. Each of the first circuit and the second circuit includes plurality of switching circuits configured to provide the first variable capacitance or inductance and the second variable capacitance or inductance. Each of the plurality of switching circuits includes a diode and a driver circuit configured to switch the diode. The driver circuit includes a first switch, a second switch coupled in series with the first switch, and a filter circuit that is coupled at a first end between the first switch and the second switch, and is operably coupled at a second end to the diode.
    Type: Application
    Filed: October 18, 2017
    Publication date: February 8, 2018
    Inventors: Anton Mavretic, Ian M. Costanzo, Ronald Anthony Decker