Patents by Inventor Ronald Bertram

Ronald Bertram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9012919
    Abstract: Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: April 21, 2015
    Assignee: Soitec
    Inventors: Ed Lindow, Chantal Arena, Ronald Bertram, Ranjan Datta, Subhash Mahajan
  • Publication number: 20130126896
    Abstract: Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.
    Type: Application
    Filed: January 10, 2013
    Publication date: May 23, 2013
    Applicant: Soitec
    Inventors: Ed Lindow, Chantal Arena, Ronald Bertram, Ranjan Datta, Subhash Mahajan
  • Publication number: 20130052333
    Abstract: Deposition systems include a reaction chamber, at least one thermal radiation emitter for heating matter within the reaction chamber, and at least one metrology device for detecting and/or measuring a characteristic of a workpiece substrate in situ within the reaction chamber. One or more chamber walls may be transparent to the thermal radiation and to radiation signals to be received by the metrology device, so as to allow the radiation to pass into and out from the reaction chamber, respectively. At least one volume of opaque material is located to shield a sensor of the metrology device from at least some of the thermal radiation. Methods of forming a deposition system include providing such a volume of opaque material at a location shielding the sensor from the thermal radiation. Methods of using a deposition system include shielding the sensor from at least some of the thermal radiation.
    Type: Application
    Filed: December 15, 2011
    Publication date: February 28, 2013
    Applicant: SOITEC
    Inventors: Ed Lindow, Ronald Bertram, Claudio Canizares
  • Patent number: 8377802
    Abstract: Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: February 19, 2013
    Assignee: Soitec
    Inventors: Ed Lindow, Chantal Arena, Ronald Bertram, Ranjan Datta, Subhash Mahajan
  • Publication number: 20110284863
    Abstract: Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.
    Type: Application
    Filed: March 23, 2011
    Publication date: November 24, 2011
    Applicants: Arizona Board of Regents for and on Behalf of Arizona State University, S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
    Inventors: Ed Lindow, Chantal Arena, Ronald Bertram, Ranjan Datta, Subhash Mahajan
  • Patent number: 7816236
    Abstract: Chemical vapor deposition methods use trisilane and a halogen-containing etchant source (such as chlorine) to selectively deposit Si-containing films over selected regions of mixed substrates. Dopant sources may be intermixed with the trisilane and the etchant source to selectively deposit doped Si-containing films. The selective deposition methods are useful in a variety of applications, such as semiconductor manufacturing.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: October 19, 2010
    Assignee: ASM America Inc.
    Inventors: Matthias Bauer, Chantal Arena, Ronald Bertram, Pierre Tomasini, Nyles Cody, Paul Brabant, Joseph Italiano, Paul Jacobson, Keith Doran Weeks
  • Publication number: 20080026149
    Abstract: Chloropolysilanes are utilized in methods and systems for selectively depositing thin films useful for the fabrication of various devices such as microelectronic and/or microelectromechanical systems (MEMS).
    Type: Application
    Filed: May 24, 2007
    Publication date: January 31, 2008
    Applicant: ASM America, Inc.
    Inventors: Pierre Tomasini, Chantal Arena, Matthias Bauer, Nyles Cody, Ronald Bertram, Jianqing Wen, Matthew Stephens
  • Publication number: 20060234504
    Abstract: Chemical vapor deposition methods use trisilane and a halogen-containing etchant source (such as chlorine) to selectively deposit Si-containing films over selected regions of mixed substrates. Dopant sources may be intermixed with the trisilane and the etchant source to selectively deposit doped Si-containing films. The selective deposition methods are useful in a variety of applications, such as semiconductor manufacturing.
    Type: Application
    Filed: January 30, 2006
    Publication date: October 19, 2006
    Inventors: Matthias Bauer, Chantal Arena, Ronald Bertram, Pierre Tomasini, Nyles Cody, Paul Brabant, Joseph Italiano, Paul Jacobson, Keith Weeks
  • Publication number: 20060226117
    Abstract: A method of and apparatus for regulating carbon dioxide using a pre-injection assembly coupled to a processing chamber operating at a supercritical state is disclosed. The method and apparatus utilize a source for providing supercritical carbon dioxide to the pre-injection assembly and a temperature control element for maintaining the pre-injection region at a supercritical temperature and pressure.
    Type: Application
    Filed: March 29, 2005
    Publication date: October 12, 2006
    Inventors: Ronald Bertram, Joseph Hillman, Maximilan Biberger
  • Publication number: 20060213820
    Abstract: A method and apparatus for removing contaminants from a fluid are disclosed. The fluid is introduced into a decontamination chamber such that the fluid is cooled and contaminants fall out within the decontamination chamber, producing a purified fluid. The purified fluid is then retrieved and can be used in a supercritical processing system.
    Type: Application
    Filed: March 23, 2005
    Publication date: September 28, 2006
    Inventors: Ronald Bertram, Douglas Scott