Abstract: The present invention provides a method and apparatus for a mass storage subsystem such as a RAID array. The invention includes a housing which defines first and second cavities with the first cavity housing an array controller such as a RAID controller. The second cavity houses a plurality of substantially conventional IDE drives conforming to the 3.5″ form factor. The array is configured to maximize cooling of the array controller and the drives within the extremely small space defined by the housing.

Abstract: The present invention provides a method and apparatus whereby a single engine can manage multiple DMA queues and related functions for a mass storage subsystem such as a RAID array. By operating the engine at a suitably high clock rate, the key buses may be time multiplexed such that each bus operates at substantially its optimum frequency to maintain high efficiency of data throughput. To improve performance further, the DMA addressing function is allocated additional phases whenever the remaining buses have not requested access to the RAID engine.

Abstract: A light pipe array includes a series of light pipes connected to a runner. The light pipes and runner are preferably molded as a single piece using a clear or transparent plastic. The runner is fabricated to have a relatively small cross-section when compared to the light pipes. The interconnection between the runner and each light pipe is chosen so that each light pipe is oriented to be substantially perpendicular to the runner. Additionally, the interconnection between the runner and each light pipes is chosen so that the runner is in close proximity to the light ray exit end of each light pipe. The small cross-section of the runner, the perpendicular relationship between the runner and the light pipes and the location of the connection between the runner and the light pipes provides a light pipe array exhibiting little or no contamination between the included light pipes.