Patents by Inventor Ronald. C. Hanson

Ronald. C. Hanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for manufacturing semiconductor BICMOS device
    Patent number: 4824796
    Abstract: A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks.
    Type: Grant
    Filed: July 10, 1987
    Date of Patent: April 25, 1989
    Assignees: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Tzu-Yin Chiu, Gen M. Chin, Ronald C. Hanson, Maureen Y. Lau, Kwing F. Lee, Mark D. Morris, Alexander M. Voshchenkov, Avinoam Kornblit, Joseph Lebowitz, William T. Lynch
  • Process for manufacturing semiconductor BICMOS device
    Patent number: 4784971
    Abstract: A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has a typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks.
    Type: Grant
    Filed: May 8, 1987
    Date of Patent: November 15, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: Tzu-Yin Chiu, Gen M. Chin, Ronald. C. Hanson, Maureen Y. Lau, Kwing F. Lee, Mark D. Morris, Alexander M. Voschenkov