Patents by Inventor Ronald Charles Babich, JR.
Ronald Charles Babich, JR. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12198256Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.Type: GrantFiled: November 14, 2023Date of Patent: January 14, 2025Assignee: NVIDIA CorporationInventors: Gregory Muthler, John Burgess, Ronald Charles Babich, Jr., William Parsons Newhall, Jr.
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Patent number: 12198253Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.Type: GrantFiled: August 30, 2023Date of Patent: January 14, 2025Assignee: NVIDIA CorporationInventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., Ignacio Llamas, John Burgess
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Publication number: 20250004947Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.Type: ApplicationFiled: September 11, 2024Publication date: January 2, 2025Inventors: Gregory A. MUTHLER, Timo AILA, Tero KARRAS, Samuli LAINE, William Parsons NEWHALL, JR., Ronald Charles BABICH, JR., John BURGESS, Ignacio LLAMAS
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Method for continued bounding volume hierarchy traversal on intersection without shader intervention
Patent number: 12148088Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: GrantFiled: March 31, 2023Date of Patent: November 19, 2024Assignee: NVIDIA CorporationInventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas -
Patent number: 12124378Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.Type: GrantFiled: April 20, 2023Date of Patent: October 22, 2024Assignee: NVIDIA CorporationInventors: Gregory A. Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
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Publication number: 20240211255Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.Type: ApplicationFiled: March 5, 2024Publication date: June 27, 2024Inventors: Ronald Charles BABICH, JR., John BURGESS, Jack CHOQUETTE, Tero KARRAS, Samuli LAINE, Ignacio LLAMAS, Gregory MUTHLER, William Parsons NEWHALL, JR.
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Publication number: 20240169655Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.Type: ApplicationFiled: January 23, 2024Publication date: May 23, 2024Inventors: Greg MUTHLER, Ronald Charles BABICH, JR., William Parsons NEWHALL, Jr., Peter NELSON, James ROBERTSON, John BURGESS
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Patent number: 11966737Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.Type: GrantFiled: September 2, 2021Date of Patent: April 23, 2024Assignee: NVIDIA CORPORATIONInventors: Ronald Charles Babich, Jr., John Burgess, Jack Choquette, Tero Karras, Samuli Laine, Ignacio Llamas, Gregory Muthler, William Parsons Newhall, Jr.
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Publication number: 20240104826Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.Type: ApplicationFiled: November 14, 2023Publication date: March 28, 2024Inventors: Gregory MUTHLER, John BURGESS, Ronald Charles BABICH, JR., William Parsons Newhall, JR.
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Patent number: 11928772Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.Type: GrantFiled: August 17, 2022Date of Patent: March 12, 2024Assignee: NVIDIA CorporationInventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
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Patent number: 11854141Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.Type: GrantFiled: October 18, 2022Date of Patent: December 26, 2023Assignee: NVIDIA CorporationInventors: Gregory Muthler, John Burgess, Ronald Charles Babich, Jr., William Parsons Newhall, Jr.
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Patent number: 11790595Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.Type: GrantFiled: September 30, 2021Date of Patent: October 17, 2023Assignee: NVIDIA CorporationInventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., Ignacio Llamas, John Burgess
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Publication number: 20230237729Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: ApplicationFiled: March 31, 2023Publication date: July 27, 2023Inventors: Greg MUTHLER, Tero KARRAS, Samuli LAINE, William Parsons NEWHALL, JR., Ronald Charles BABICH, JR., John BURGESS, Ignacio LLAMAS
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Patent number: 11675704Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.Type: GrantFiled: September 23, 2021Date of Patent: June 13, 2023Assignee: NVIDIA CorporationInventors: Greg Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
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Method for continued bounding volume hierarchy traversal on intersection without shader intervention
Patent number: 11645810Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: GrantFiled: November 5, 2021Date of Patent: May 9, 2023Assignee: NVIDIA CorporationInventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas -
Publication number: 20230041724Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.Type: ApplicationFiled: October 18, 2022Publication date: February 9, 2023Inventors: Gregory MUTHLER, John BURGESS, Ronald Charles BABICH, JR., William Parsons Newhall, JR.
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Publication number: 20220392148Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.Type: ApplicationFiled: August 17, 2022Publication date: December 8, 2022Inventors: Greg Muthler, Ronald Charles Babich, JR., William Parsons Newhall, JR., Peter Nelson, James Robertson, John Burgess
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Patent number: 11508112Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.Type: GrantFiled: June 18, 2020Date of Patent: November 22, 2022Assignee: NVIDIA CorporationInventors: Gregory Muthler, John Burgess, Ronald Charles Babich, Jr., William Parsons Newhall, Jr.
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Patent number: 11455768Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.Type: GrantFiled: December 4, 2020Date of Patent: September 27, 2022Assignee: NVIDIA CorporationInventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
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METHOD FOR CONTINUED BOUNDING VOLUME HIERARCHY TRAVERSAL ON INTERSECTION WITHOUT SHADER INTERVENTION
Publication number: 20220058856Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.Type: ApplicationFiled: November 5, 2021Publication date: February 24, 2022Inventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, JR., Ronald Charles Babich, JR., John Burgess, Ignacio Llamas