Abstract: A dual set of memory control circuit cards, one of which services a master processor and one of which serves a slave processor in a data communication Network Support Processor. Each memory control circuit card provides a local memory for each of said processors and further provides access logic circuitry for developing addresses to access an external shared memory means. Control flags and interrupt signals regulate any conflict in operation between the two memory control circuit card units when accessing the commonly shared memory.

Abstract: A dual-processor, general purpose mini-computer which is programmed as a front-end data communications processor and is called a Network Support Processor. Data transfer commands received from a main host computer are executed and result messages are returned to the main host computer by the Network Support Processor. A base connection module providing slide-in connector cards houses and supports circuit cards which make up the Network Support Processor. These cards include a master controller which includes a master processor card, a master memory control card and an Interface Card which connects to a main host computer and to one or more line communications processors, each of which may handle up to 16 data communications lines. A slave controller likewise includes a slave processor circuit card, and a slave memory control circuit card. A series of slide-in memory cards forming a shared memory storage means connect to both the master and the slave memory control circuit cards.

Abstract: Base connection modules are used to house slide-in cards which form a Network Support Processor which executes data transfer operations for up to four main host computers. One Network Support Processor can control up to four Line Support Processors, each one of which manages up to 16 Line Adapters connected, via data communication lines, to remote terminals. The line Support Processor, via its Line Adapters, handles a wide variety of communication line disciplines but provides a common discipline to its Network Support Processor and the host computer.

Abstract: In a digital data communication network there is provided a data communications subsystem working in conjunction with a main host system having a central host processor and main memory. The data communications subsystem provides a data communications processor and a local autonomous data communications memory connected to a basic control interface unit which supports a plurality of front-end controllers. The data communications subsystem can sense a halt in the main system and operate autonomously and independently of the main host system during such down-time. The present disclosure describes a front-end controller-processor called an adapter cluster module which is used to control a plurality of line adapters, each of which communicates with remote terminals on low to medium speed transmission lines. Up to 16 such adapter cluster modules may be accommodated as front-end controllers within a single data communications subsystem.