Abstract: Disclosed is a method of fabricating semiconductor devices having sub-micron gate electrodes using angle and direct evaporation techniques. A first and second photoresist layer are formed atop a substrate and the second layer is selectively processed to form an edge with a well controlled profile. A first metal is evaporated at a first angle and the edge of the second photoresist layer shields a portion of the first photoresist layer form metal deposition which defines a patterned opening of desired width. The patterned opening is now etched in a well controlled manner to expose a portion of the active channel region of the device, and a desired height is defined by the distance from the first metal layer to the exposed channel region. A second layer is deposited by evaporation at a second angle thereby forming a plug in the channel region wherein placement of one edge of the plug is determined by the height and the second angle.