Patents by Inventor Ronald E. Sorace

Ronald E. Sorace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6683392
    Abstract: A switch matrix 10 is provided comprising a plurality of input modules X and a plurality of output modules P. Each input module 16 has a plurality of first input interconnections 14, a plurality of first interconnected switches 21, and a plurality of first output interconnections 20. Each output module 18 has a plurality of second input interconnections 23, a plurality of second interconnected switches 24, and a plurality of second output interconnections 20. The plurality of input modules X is electrically coupled to the plurality of output modules P, forming a plurality of signal paths 12 having a plurality of interconnected switches K per signal path 12. A method is also provided minimizing the total number of interconnected switches Z within the switch matrix 10 for a particular application. The method comprises determining switch matrix design requirements, calculating the values of X and P, and performing an integer partitioning process.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: January 27, 2004
    Assignee: The Boeing Company
    Inventors: Victor Reinhardt, Peter Turley, Ronald E. Sorace, Shih-Chang Wu
  • Publication number: 20030038547
    Abstract: A switch matrix 10 is provided comprising a plurality of input modules X and a plurality of output modules P. Each input module 16 has a plurality of first input interconnections 14, a plurality of first interconnected switches 21, and a plurality of first output interconnections 20. Each output module 18 has a plurality of second input interconnections 23, a plurality of second interconnected switches 24, and a plurality of second output interconnections 20. The plurality of input modules X is electrically coupled to the plurality of output modules P, forming a plurality of signal paths 12 having a plurality of interconnected switches K per signal path 12. A method is also provided minimizing the total number of interconnected switches Z within the switch matrix 10 for a particular application. The method comprises determining switch matrix design requirements, calculating the values of X and P, and performing an integer partitioning process.
    Type: Application
    Filed: August 20, 2001
    Publication date: February 27, 2003
    Inventors: Victor Reinhardt, Peter Turley, Ronald E. Sorace, Shih-Chang Wu
  • Patent number: 5861843
    Abstract: Methods and systems for calibrating an array antenna are described. The array antenna has a plurality of antenna elements each having a signal with a phase and an amplitude forming an array antenna signal. For calibration, the phase of each element signal is sequentially switched one at a time through four orthogonal phase states. At each orthogonal phase state, the power of the array antenna signal is measured. A phase and an amplitude error for each of the element signals is determined based on the power of the array antenna signal at each of the four orthogonal phase states. The phase and amplitude of each of the element signals is then adjusted by the corresponding phase and amplitude errors.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: January 19, 1999
    Assignee: Hughes Electronics Corporation
    Inventors: Ronald E. Sorace, Victor S. Reinhardt, Clinton Chan
  • Patent number: 5668842
    Abstract: A plurality of biphase modulators (42) each modulate a sinusoidal radio frequency signal based upon a corresponding one of a plurality of bits contained in a time-dependent data word. The biphase modulators (42) form a plurality of biphase modulated signals which are communicated to a summing network (40). The summing network (40) contains a plurality of attenuators (44) which attenuate the modulated signals to form a plurality of attenuated signals. The summing network (40) combines the attenuated signals to form a radio frequency signal.
    Type: Grant
    Filed: February 28, 1995
    Date of Patent: September 16, 1997
    Assignee: Hughes Aircraft Company
    Inventors: Ronald E. Sorace, Victor S. Reinhardt, Steven A. Vaughn
  • Patent number: 5504461
    Abstract: A slotline binary phase shift keyed (BPSK) modulator that is capable of operating at high frequency with relatively low sensitivity to terminating impedance. The slotline BPSK modulator comprises a slotline formed in a conductive layer disposed on a substrate, and a pair of diodes coupled to the conductive layer and disposed across the slotline. An RF carrier input signal is coupled to the slotline using a microstrip-to-coplanar line transition that forms one portion of a balanced transformer. The balanced transformer applies the RF carrier input signal with equal amplitude and 180 degree phase difference to each of the diodes. A modulating baseband signal is injected into the microstrip-to-coplanar line transition through a microstrip line and a lumped element low pass filter coupled to the microstrip-to-coplanar line transition. A direct via hole is provided for coupling a baseband modulating signal from the microstrip-to-coplanar line transition to the diodes.
    Type: Grant
    Filed: January 26, 1995
    Date of Patent: April 2, 1996
    Inventors: Steven A. Vaughn, Ronald E. Sorace