Abstract: An arrangement and method for arbitration to enable split transaction bus protocols provides for a slave to assert a mask signal that sets a mask bit in a mask register when the slave is not ready to complete a requested transaction. A requesting master is forced off the bus and prevented from re-arbitrating while the mask bit is set in the register. When the slave is ready to complete the transaction, a release master signal is asserted which causes the bit in the shift register to be reset. The requesting master is then able to re-arbitrate for use of the bus to complete the transaction. The usable bandwidth of the bus is increased since other masters are able to arbitrate and use the bus until the slave is ready to complete the transaction with the first requesting master.

Abstract: A data processing system includes a planar board having a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets or slots, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device; and each card is pre-wired with an ID value corresponding to its card type. Software programmable option registers on each card store parameters such as designated default (or alternate) address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in slot positions in main memory, one position being assigned to each slot on the board. Each slot position is adapted to hold the parameters associated with the card inserted in its respective slot and the card ID value.

Abstract: A data processing system includes a planar board having a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets or slots, each adapted to receive a selected one of a plurality of different and/or similar option cards. each card contains (or is connected to) and controls a respective peripheral device; and each card is pre-wired with an ID value corresponding to its card type. Software programmable option registers on each card store parameters such as designated default (or alternate) address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in slot positions in main memory, one position being assigned to each slot on the board. Each slot position is adapted to hold the parameters associated with the card inserted in its respective slot and the card ID value.