Abstract: A touch screen controller system for controlling a touch screen having row conductors and column conductors includes analog-digital circuitry coupled to the row conductors and column conductors to produce digital signals representative of self capacitance changes of one of the column conductors during an element proximity scanning mode and also representative of mutual changes of the touch screen during an element location scanning mode. The analog-digital circuitry indicates the influence of an element on the self-capacitance during the element proximity scanning. Proximity-determining circuitry operates on the digital signal changes during the element proximity scanning to determine if the element is proximate to the touch screen, and also to determine if the element is a specific kind of element by comparing the digital signal changes to a predetermined data profile.

Abstract: A touch screen controller system for controlling a touch screen having row conductors and column conductors includes analog-digital circuitry coupled to the row conductors and column conductors to produce digital signals representative of self capacitance changes of one of the column conductors during an element proximity scanning mode and also representative of mutual changes of the touch screen during an element location scanning mode. The analog-digital circuitry indicates the influence of an element on the self-capacitance during the element proximity scanning. Proximity-determining circuitry operates on the digital signal changes during the element proximity scanning to determine if the element is proximate to the touch screen, and also to determine if the element is a specific kind of element by comparing the digital signal changes to a predetermined data profile.

Abstract: A touch screen controller system for controlling a touch screen having row conductors and column conductors includes analog-digital circuitry coupled to the row conductors and column conductors to produce digital signals representative of self capacitance changes of one of the column conductors during an element proximity scanning mode and also representative of mutual changes of the touch screen during an element location scanning mode. The analog-digital circuitry indicates the influence of an element on the self-capacitance during the element proximity scanning. Proximity-determining circuitry operates on the digital signal changes during the element proximity scanning to determine if the element is proximate to the touch screen, and also to determine if the element is a specific kind of element by comparing the digital signal changes to a predetermined data profile.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A touch screen controller system for controlling a touch screen having row conductors and column conductors includes analog-digital circuitry coupled to the row conductors and column conductors to produce digital signals representative of self capacitance changes of one of the column conductors during an element proximity scanning mode and also representative of mutual changes of the touch screen during an element location scanning mode. The analog-digital circuitry indicates the influence of an element on the self-capacitance during the element proximity scanning. Proximity-determining circuitry operates on the digital signal changes during the element proximity scanning to determine if the element is proximate to the touch screen, and also to determine if the element is a specific kind of element by comparing the digital signal changes to a predetermined data profile.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A touch screen controller produces a first signal (DATA) representative of a self capacitance (Cselfj) of a touch screen (13A) during a presence scanning mode and representative of mutual capacitances (Cmij) of the screen during a location scanning mode. The first signal is calibrated during the presence scanning and during the location scanning to produce a second signal (?DATA) which may represent either self-capacitance changes (?Cselfj) caused by proximity of an element (22) during presence scanning or mutual capacitance changes (?Cmij) caused the element during location scanning. The second signal is operated upon during presence scanning to determine to determine proximity of the element relative to the screen and during location scanning to produce a magnitude map of the mutual capacitance changes.

Abstract: A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.

Abstract: A capacitance measuring system includes analog-digital circuitry (15) coupled to row conductors (2i) and column conductors (3i) of a touch screen panel (13A) for producing a first digital signal (DATA) representative of cross-coupling capacitances (CSENij). Row drive circuitry (45) superimposes charge transfers from cross-coupling capacitances of the row conductors to a first column conductor to cause the first digital signal to be a convoluted signal. Calibration circuitry (39,40) subtracts base line data from the first digital signal to produce a second digital signal (?DATA) representing touch-induced capacitance change values (?CSENIJ). A deconvolution circuit (44) deconvolutes the second digital signal to produce a digital output (58) representing a magnitude map of the touch-induced capacitance change values.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.

Abstract: A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.

Abstract: A capacitance measuring system includes analog-digital circuitry (15) coupled to row conductors (2i) and column conductors (3i) of a touch screen panel (13A) for producing a first digital signal (DATA) representative of cross-coupling capacitances (CSENij). Row drive circuitry (45) superimposes charge transfers from cross-coupling capacitances of the row conductors to a first column conductor to cause the first digital signal to be a convoluted signal. Calibration circuitry (39,40) subtracts base line data from the first digital signal to produce a second digital signal (?DATA) representing touch-induced capacitance change values (?CSENIJ). A deconvolution circuit (44) deconvolutes the second digital signal to produce a digital output (58) representing a magnitude map of the touch-induced capacitance change values.

Abstract: A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.

Abstract: A CMOS image sensor system includes first and second groups of CMOS sensors each responsive to periodic first and second clock signal edges, the second clock signal edge being out-of-phase with the first clock signal edge. Output signals of the first group of CMOS sensors are coupled to a first group of sampling capacitors, respectively, by a first group of sampling switches. Then output signals of the second group of CMOS sensors are coupled to a second group of sampling capacitors, respectively, by means of a second group of sampling switches. Sampled signals on the second group of sampling capacitors to an input of an ADC, and then sampled signals on the first group of sampling capacitors are coupled to the input of the ADC by means of by multiplexing and sample/hold circuitry. A phase of at least one of the first and second clock signal edges is adjusted in response to calibration information so as to avoid circuit noise from being superimposed on sampled signals coupled to the input of the ADC.

Abstract: A switched-capacitor sample/hold circuit includes a switched-capacitor input sampling stage and a sample/hold amplifier circuit including an operational amplifier having first and second inputs coupled to first and second input sampling capacitors, respectively, and first and second feedback capacitors coupled between the first and second inputs and first and second outputs of the operational amplifier. A continuous-time offset DAC receives a digital input signal representative of an offset voltage produces first and second offset correction voltages. The first and second offset correction voltages are coupled to the switched-capacitor sample/hold circuit to adjust the amount of pre-charging of the first and second feedback capacitors, respectively, in accordance with the value of the digital input signal to compensate an offset component associated with the and second input voltages. The output of the switched-capacitor sample/hold circuit can be connected to an ADC.