Patents by Inventor Ronald F. Marks

Ronald F. Marks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4860066
    Abstract: An environmental interface for a semiconductor electro-optical conversion device layer that is optically transparent, electrically conductive and chemically passivating, made of an elemental semiconductor with an indirect band gap>1 electron volt in a layer between 20 and 200 Angstroms thick. A GaAs covered by GaAlAs converter with a 100 Angstrom Si layer over the GaAlAs is illustrated.
    Type: Grant
    Filed: January 8, 1987
    Date of Patent: August 22, 1989
    Assignee: International Business Machines Corporation
    Inventors: Peter D. Kirchner, Ronald F. Marks, George D. Pettit, Jerry M. Woodall, Steven L. Wright
  • Patent number: 4821082
    Abstract: Heterojunction bipolar transistors are disclosed having an energy band offset in the valence or conduction band and the other of the bands being substantially aligned at the heterojunction. For an npn transistor the conduction band is substantially aligned and the bandgap difference is in the valence band. A pnp type transistor is also disclosed wherein all the bandgap difference is in the conduction band and the valence band is substantially aligned. The npn type transistor provides improved hole confinement in the base as well as enhanced electron injection and collection. In one embodiment of a double heterojunction bipolar transistor, materials are selected that utilize Ga compounds in the base and Al and/or In compounds in the emitter and collector, which have a valence band offset of approximately 400 meV or greater and an aligned conduction band at both of the heterojunctions.
    Type: Grant
    Filed: October 30, 1987
    Date of Patent: April 11, 1989
    Assignee: International Business Machines Corporation
    Inventors: David J. Frank, Ronald F. Marks
  • Patent number: 4685606
    Abstract: A method of joining a thermally conductive element to an electric circuit chip for cooling the chip includes initial steps of forming an oxide-free preform of a fusible metal alloy by extrusion of alloy between two mold blocks or plates. During the extrusion, the oxide coating is left behind so that the extruded alloy is essentially free of oxide. The extrusion takes place at a temperature elevated to approximately the liquidus temperature of the alloy. The preform, which may be in the form of a pill or section of thin foil, is placed between interfacing surfaces of the thermally conductive element and the chip, and is then extruded along the interfacing surfaces under pressure and elevated temperature to form a thermally conductive, oxide-free bonding layer of superior thermal conductivity.
    Type: Grant
    Filed: May 9, 1986
    Date of Patent: August 11, 1987
    Assignee: International Business Machines Corporation
    Inventors: Ephraim B. Flint, Peter A. Gruber, Ronald F. Marks, Graham Olive, Arthur R. Zingher