Abstract: Examples of systems and methods are provided for designing a remote view of a local application. A system may receive a request from a remote client device to launch a local application at a local server. The system may select a configuration file associated with the local application and with the remote client device. The configuration file may comprise a control code for at least one user action to control the local application. The system may provide the configuration file directed to the remote client. The system may receive from the remote client device, a control code from a configuration file previously provided to the remote client device. The system may control the local application based on the received control code. The system may provide display output data of the local application directed to the remote client device.

Abstract: Examples of systems and methods are provided for rendering a composite view of an application. A system may display a local graphical user interface (GUI) and a remote application view associated with a remote application running at a remote server. The system may provide a message directed to a remote server to launch a remote application at the remote server. The system may receive a configuration file from the remote server. The system may register a GUI event listed in the configuration file. The system may display a local GUI based on the configuration file. The system may receive display output data of the remote application running on the remote server. The system may render a composite view including the local GUI based on the configuration file and a remote application view based on the display output data.

Abstract: Examples of systems and methods are provided for handling remote drawing commands. A system may comprise a buffer module configured to receive, at the system from a remote server system over a remote access connection between the system and the remote server system during a remote connection session, remote drawing commands, according to a drawing command rate, of a remote application running on the remote server system. The buffer module may be configured to store the remote drawing commands. The system may comprise a timer module configured to facilitate sending at least some of the remote drawing commands in the buffer module to a graphics module according to a refresh rate that is less than the drawing command rate. The timer module may be application agnostic.

Abstract: Examples of systems and methods are provided for rendering a composite view of an application. A system may display a local graphical user interface (GUI) and a remote application view associated with a remote application running at a remote server. The system may provide a message directed to a remote server to launch a remote application at the remote server. The system may receive a configuration file from the remote server. The system may register a GUI event listed in the configuration file. The system may display a local GUI based on the configuration file. The system may receive display output data of the remote application running on the remote server. The system may render a composite view including the local GUI based on the configuration file and a remote application view based on the display output data.

Abstract: Examples of systems and methods are provided for handling remote drawing commands. A system may comprise a buffer module configured to receive, at the system from a remote server system over a remote access connection between the system and the remote server system during a remote connection session, remote drawing commands, according to a drawing command rate, of a remote application running on the remote server system. The buffer module may be configured to store the remote drawing commands. The system may comprise a timer module configured to facilitate sending at least some of the remote drawing commands in the buffer module to a graphics module according to a refresh rate that is less than the drawing command rate. The timer module may be application agnostic.

Abstract: Examples of systems and methods are provided for communication, scrolling a remote application, and scrolling a local application based on one or more commands from a remote client device. A system may comprise a viewer controller module configured to receive, at the system from a remote server over a remote access connection between the system and the remote server during a remote connection session, an overall content size of a remote application running on the remote server. The viewer controller module may be configured to generate a scrolling command to control a first remote application view at the system of the remote application. The scrolling command may be based on one or more native scrolling gestures, a first display output at the system of the remote application and the overall content size of the remote application.

Abstract: Examples of systems and methods are provided for designing a remote view of a local application. A system may receive a request from a remote client device to launch a local application at a local server. The system may select a configuration file associated with the local application and with the remote client device. The configuration file may comprise a control code for at least one user action to control the local application. The system may provide the configuration file directed to the remote client. The system may receive from the remote client device, a control code from a configuration file previously provided to the remote client device. The system may control the local application based on the received control code. The system may provide display output data of the local application directed to the remote client device.

Abstract: Methods for interconnecting base, switching and interconnect resources for configurable integrated circuits are provided, where these methods include the following steps: interconnecting base and switching resources with interconnect resources to form a hierarchical interconnect structure; physically placing the hierarchical interconnect structure in a two dimensional format; and directly interconnecting selected neighboring base and switching resources. The integrated circuits generated include base resources, interconnect resources; and switching resources that are interconnected to form a hierarchical interconnect structure, and, additional interconnect resources that directly interconnect neighboring switching or base resources.

Abstract: The present invention relates to methods for interconnecting base, switching and interconnect resources for configurable integrated circuits that include the following steps: interconnecting base and switching resources with interconnect resources to form a hierarchical interconnect structure; physically placing the hierarchical interconnect structure in a two dimensional format; and directly interconnecting selected neighboring base and switching resources. The integrated circuits generated include base resources, interconnect resources; and switching resources that are interconnected to form a hierarchical interconnect structure, and, additional interconnect resources that directly interconnect neighboring switching or base resources.

Abstract: An SOC architecture that provides a latency tolerant protocol for internal bus signals is disclosed. The SOC includes at least a processor core and one or more peripherals that communicate on a first internal bus that carries signals having a latency tolerant signal protocol that enables an arbitrary number of pipeline stages between any signal initiator and any signal target. A shared memory subsystem, DMA-type peripherals, and a second internal bus with a topology overlapping the first bus, may also be included. All signals over both busses are point-to-point and registered and all transactions on both busses are handshaked. An arbitrary number of flip-flops, multiplexing routers, and/or decoding routers may be included between any signal initiator and any signal target on either bus, and may be added at any time during the design and layout of the SOC.

Abstract: A computer that provides data to a video display using a bitmap display memory organization and bitplane addressing. Separate control is provided for two bitplane backgrounds and for eight reusable and easily movable sprites. Additional logic allows for dynamically-controllable interobject priority and collision detection among data in each of the bitplane backgrounds and sprites. A coprocessor provides for video beam-synchronized changes to data in registers, freeing the main processor for general purpose computing tasks. A block image transferer is provided to rapidly copy data in large blocks from one memory location to another. In hold-and-modify mode, color output circuitry holds the values for a previously displayed pixel while bitplane data modifies those values, allowing for simultaneous display of a greatly increased number of colors.

Abstract: A computer that provides data to a video display using a bitmap display memory organization and bitplane addressing. Separate control is provided for two bitplane backgrounds and for eight reusable and easily movable sprites. Additional logic allows for dynamically-controllable interobject priority and collision detection among data in each of the bitplane backgrounds and sprites. A coprocessor provides for video beam-synchronized changes to data in registers, freeing the main processor for general purpose computing tasks. A block image transfer is provided to rapidly copy data in large blocks from one memory location to another. In hold-and-modify mode, color output circuitry holds the value for a previously displayed pixel while bitplane data modifies those values, allowing for simultaneous display of a greatly increased number of colors.

Abstract: A video game home computer is implemented in NMOS (n type metal oxide semiconductor) technology with plural microprocessors. Centralized bus architecture and direct memory access (DMA) techniques are employed. A video display generator provides color signal outputs to drive a commercial television receiver display. This display generator receives inputs from both microprocessors and obtains data directly from memory. A bit map of display information is kept in memory, wherein bits of information in memory image the precise screen display for each instance in time. A bit map manipulator circuit performs, under microprocessor direction, logic function manipulation of the bit map data. Access between system components is accomplished via the bus architecture on a priority queue basis. Chip count and chip area is minimized.