Patents by Inventor Ronald Hilton

Ronald Hilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964989
    Abstract: Compounds that inhibit KRas G12D. In particular, compounds that inhibit the activity of KRas G12D, pharmaceutical compositions comprising the compounds and methods of use therefor, and in particular, methods of treating cancer. The compounds have a general structure represented by Formula (I): or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 23, 2024
    Assignees: Mirati Therapeutics, Inc., Array BioPharma Inc.
    Inventors: Xiaolun Wang, Aaron Craig Burns, James Gail Christensen, John Michael Ketcham, John David Lawson, Matthew Arnold Marx, Christopher Ronald Smith, Shelley Allen, James F. Blake, Mark Joseph Chicarelli, Joshua Ryan Dahlke, Donghua Dai, Jay Bradford Fell, John Peter Fischer, Macedonio J. Mejia, Brad Newhouse, Phong Nguyen, Jacob Matthew O'Leary, Spencer Pajk, Martha E. Rodriguez, Pavel Savechenkov, Tony P. Tang, Guy P.A. Vigers, Qian Zhao, Dean Russell Kahn, John Gaudino, Michael Christopher Hilton
  • Patent number: 7092869
    Abstract: Emulation of a guest computer architecture on a host system of another computer architecture. Legacy instructions are translated into translated instructions. If the particular legacy instruction is an operand-setting instruction for storing a value of a precedent operand, a corresponding flag is set when the value of the precedent operand has not been determined. If the particular legacy instruction is an operand-using instruction for using the precedent operand, a check is made to determine if the corresponding flag is set.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: August 15, 2006
    Inventor: Ronald Hilton
  • Publication number: 20060107000
    Abstract: A method and system for partitioning a computer system into multiple virtual machines is disclosed. The system may include multiple logical partitions, each with their own set of physical resources controlled by a partition processor. The system may also include an external processor that maintains a map of what resources belong to what partitions. The logical partitions within the system may maintain a peer-to-peer relationship.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 18, 2006
    Inventors: Lee Jung-Ik, Daniel Ketcham, Ronald Hilton
  • Publication number: 20060106992
    Abstract: A method and system for a decentralized distributed storage data system. A plurality of central processors each having a cache may be directly coupled to a shared set of data storage units. A high speed network may be used to communicate at a physical level between the central processors. A coherency protocol may be used to communicate at a logical level between the central processors.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Inventors: Armando Palomar, Ronald Kreuzenstein, Ronald Hilton
  • Publication number: 20060107023
    Abstract: A method and system of sparse table compaction is disclosed. A repeating data pattern may be detected in a large data structure, identifying the large data structure as a sparse table. The large data structure is stored in a virtual memory as a series of virtual data pages. Multiple repeating virtual data pages may be mapped to a single physical data page on a multiple-to-one basis. Unique virtual data page may be mapped to a unique physical data page on a one-to-one basis.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 18, 2006
    Inventors: Vernon Johnson, Ronald Hilton
  • Publication number: 20060085601
    Abstract: A method and system of organizing a cache memory system based on a temporal-access pattern is disclosed. One or more data entries may be stored in a memory. One or more cache entries of the one or more data entries may be stored in a temporal cache. The one or more cache entries may be physically organized based on a temporal access pattern.
    Type: Application
    Filed: October 19, 2005
    Publication date: April 20, 2006
    Inventors: Gary Woffinden, Victor Penacho, Ronald Hilton
  • Publication number: 20060085599
    Abstract: A method and system of storing to an instruction stream with a multiprocessor or multiple-address-space system is disclosed. A central processing unit may cache instructions in a cache from a page of primary code stored in a memory storage unit. The central processing unit may execute cached instructions from the cache until a serialization operation is executed. The central processing unit may check in a message queue for a notification message indicating potential storing to the page. If the notification message is present in the message queue, cached instructions from the page are invalidated.
    Type: Application
    Filed: October 19, 2005
    Publication date: April 20, 2006
    Inventors: Gary Woffinden, Paul Leisy, Ronald Hilton
  • Publication number: 20030093775
    Abstract: Legacy instructions of a guest system are dynamically emulated on a host system in blocks using block addresses. Detailed translation information is stored in a translation store. Translation indications for a subset of all the translated blocks are stored into a tracking table at block numbers determined by the block addresses. Each particular legacy instruction of a translated block is translated into one or more translated instructions for emulating the particular legacy instruction. If the particular legacy instruction is a store instruction, the indication in the tracking table is checked for the particular block number to determine if instruction data has been stored. If instruction data has been stored for the particular block number, the translation store is checked to determine if instruction data has been modified. If instruction data has not been stored for the particular block number, the checking of the translation store is bypassed adding to the efficiency of the emulation.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 15, 2003
    Inventor: Ronald Hilton
  • Publication number: 20030093649
    Abstract: Emulation of a guest computer architecture on a host system of another computer architecture. The guest computer architecture has programs composed of legacy instructions. To perform the emulation of the legacy instructions on the host system, the legacy instructions are accessed in the host system. Each particular legacy instruction is translated into one or more particular translated instructions for emulating the particular legacy instruction. RISC blocks translated from CISC blocks are held in system memory cache. The efficiency of translation of CISC blocks to RISC blocks in the cache is improved by using small-, equal-sized RISC blocks that are linked into a logical entity. The logical entity is a linked group of one or more RISC blocks logically linked for each CISC block. The logical links from one RISC block to another RISC block are implemented by a linked-list.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 15, 2003
    Inventor: Ronald Hilton
  • Publication number: 20030093774
    Abstract: Emulation of a guest computer architecture on a host system of another computer architecture. The guest computer architecture has programs composed of legacy instructions. To perform the emulation of the legacy instructions on the host system, the legacy instructions are accessed in the host system. Each particular legacy instruction is translated into one or more translated instructions for emulating the particular legacy instruction. State information is provided for determining a program execution mode for the legacy instructions. For each particular legacy instruction, a query is made to determine if translated instructions for execution mode remain stored as a result of a prior translation. If not stored, the legacy instruction is translated and the translated instructions are stored with the state information. If the translated instructions for the desired translation mode are already stored, emulation continues without need for further translation.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 15, 2003
    Inventor: Ronald Hilton
  • Publication number: 20030093776
    Abstract: Emulation of a guest computer architecture on a host system of another computer architecture. The guest computer architecture has programs composed of legacy instructions. Each particular legacy instruction is translated into one or more particular translated instructions for emulating the particular legacy instruction. If the particular legacy instruction is an operand-setting instruction for storing a value of a precedent operand, a corresponding flag is set when the value of the precedent operand has not been determined. If the particular legacy instruction is an operand-using instruction for using the precedent operand, a check is made to determine if the corresponding flag is set. If the corresponding flag is set, translation of the operand-using instruction is suspended and the one or more particular translated instructions corresponding to the operand-setting instruction are executed to determine the value of the precedent operand.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 15, 2003
    Inventor: Ronald Hilton
  • Patent number: 4017070
    Abstract: A device intended primarily for removable connection to a vaulting pole as an aid in training athletes in the proper techniques of pole vaulting is adjusted longitudinally on a vaulting pole to a selected location in the area in which the vaulting pole would be grasped by the athlete. When the device has been properly positioned, it is secured fixedly, in the selected location, defining abutments spaced longitudinally of the vaulting pole to deter the user from sliding his hands together out of their proper, hands-apart relationship. The device is also adapted to be extended adjustably to a selected length so as to predetermine, in an adjustable manner, the longitudinal spacing of the abutments defined by the opposite extremities of the training device, thus to accommodate the device to the physical characteristics of the particular user. Calibrations are utilized on the device, so as to facilitate in a determination as to the most effective spacing of the abutments or extremities thereof.
    Type: Grant
    Filed: September 29, 1975
    Date of Patent: April 12, 1977
    Inventor: H. Ronald Hilton