Abstract: A computer apparatus that interconnects a standard commercial off the shelf (COTS) computer to a proprietary system. The standard COTS computer replaces a proprietary computer and assumes its roles of controlling a workstation and a display thereof of the proprietary system. The computer apparatus comprises a frame that carries the COTS computer, a power converter, adapters, a video module, Ethernet and UBS connectors, a hard drive and the like. The frame mates with slots of a backplane of the proprietary system.

Abstract: The present invention provides a method and apparatus for facilitating communication with non-fault tolerant network nodes in a fault-tolerant network environment. In various embodiments, a network address or network location of any network nodes present on a network that are not fault-tolerant is determined and stored, and data intended for the detected non-fault-tolerant network nodes is routed only over that network to which the non-fault-tolerant network node is connected. In further embodiments, the fault-tolerant network comprises a primary and redundant network with fault tolerant network nodes that are attached to each network; a non-fault-tolerant network node that is attached to either the primary or redundant network is then operable to communicate with any fault-tolerant network node via data sent over only the network to which the non-fault-tolerant network node is connected.

Abstract: The present invention provides a method of operating a computer network with fault-tolerant nodes, comprising determining the state of a first and second link between fault-tolerant nodes and other network nodes. Data sent by the fault-tolerant node to other nodes may then be sent over a link that is selected based on the state of the first and second links. In some embodiments of the invention this takes place in an intermediate node in a network, which receives data from an originating node and forwards it to a destination node via a link selected based on the state of the first and second links.

Abstract: A system for, and method of, emulating, on a non-native computer, a native environment for a visual display object file for a real time process control system and a real time process control system employing the emulator. The visual display object file contains a drawing command, an address pointer for communicating data with the real time process control system and a rule for interpreting data received from a touch-sensitive screen.

Abstract: An apparatus controls the movement of a data block between a peripheral and a data processing system, which comprises a bus which includes an address bus, a first data bus, and a second data bus, the peripheral being connected to the second data bus. A first memory, connected to the second data bus, stores data, and a second memory, connected to the first data bus, stores a plurality of dummy routines in predetermined areas, the predetermined areas of the second memory having corresponding buffer areas in the first memory. The first memory and the second memory correspond to a first memory area and a second memory area within a total predefined memory space, each memory location within the total memory space being defined by a unique memory space address. A processor connected to the first data bus, fetches an instruction, in response to a control signal from the peripheral, from a preselected one of the dummy routines.

Abstract: An apparatus for controlling data movement between a peripheral and a data processing system, comprises a memory for storing data, wherein the memory comprises a plurality of memory modules. Each memory module corresponds to an assigned area of a first memory map, the first memory map being duplicated into a plurality of mirrored memory maps. Each mirrored memory map corresponds to a predefined operation, a composite of the first memory map and the plurality of mirrored memory maps forming a total memory space. Each memory location within the total memory space is defined by a unique memory space address. A processor performs a pseudo operation in response to a first control signal from the peripheral indicating data is available for being moved. A logic circuit generates at least one control signal in response to the pseudo operation such that a predetermined data movement operation occurs.

Abstract: An amplifier circuit is disclosed for temperature compensating the output voltage thereof with respect to undesirable temperature induced signals from a silicon pressure transducer and/or from components of the amplifier itself. The amplifier includes a first operational amplifier and a second operational amplifier. A first circuit connects the output terminal of the first operational amplifier through a summing node to one input terminal of the second amplifier. Output signals from the pressure transducer are applied between one input terminal of the first operational amplifier and another input terminal of the second amplifier. A temperature compensating circuit is connected to the summing node for enabling the output voltage of the amplifier to be substantially independent of temperature. An initial offset voltage compensating circuit is coupled to the summing node for adjusting the intercept of the pressure-to-output voltage transfer curve.

Abstract: An electrical circuit and method for providing electrical coupling from a CB antenna to both a CB (Citizen's Band--Class D) transceiver and to an AM-FM receiver (amplitude modulation--frequency modulation) whereby only a single antenna need be used for both CB transceiver and AM-FM receiver.

Abstract: A multiphase to single phase electrical energy converter wherein the frequency is converted from a relatively high frequency, in the order of 1,000 hertz, to a relatively low frequency, as for example, normal household frequency of 60 hertz. A three-phase alternator is driven by an internal combustion engine and in one form of the invention the output of the alternator is fed to a controllable, full-wave bridge circuit and finally to an inverter. The controllable bridge circuit is controlled by a resolver, the resolver, alternator rotor and internal combustion engine all operating at the same rotary speed. In the one form the resolver is utilized to control the conduction of a plurality of controlled semiconductor devices interconnected between the output windings of the alternator and the invertor to control the delivery of energy from the alternator to the inverter. In another form the controlled semiconductor devices are replaced by a modified resolver.

Abstract: A collapsible antenna, adjustable in length and carrying an impedance-matching coil, especially suitable for use with citizens-band transceivers that are operated from automobiles. When the antenna is collapsed, the coil is concealed within an antenna support, which in automotive applications is typically located beneath a vehicle body panel.