Patents by Inventor Ronald Joseph Cheponis

Ronald Joseph Cheponis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6415008
    Abstract: An electronic circuit that multiplies an input signal using primarily digital components so that the resulting circuit can be fabricated consistently by different foundries. The circuit determines a period for the input signal and converts the period to a digital number (e.g., a binary number). An adder is used to determine an average period over a predetermined number of cycles. By determining the average period, voltage fluctuations are cancelled. A multiplier allows for a variable multiplication of the averaged period. A clock generating circuit uses the results obtained by the multiplier to generate a multiplied output signal. Additionally, the input signal is routinely multiplexed with the generated output signal to ensure phase matching.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: July 2, 2002
    Inventors: Roland Albert Béchade, Ronald Joseph Cheponis