Patents by Inventor Ronald Joseph Schutz

Ronald Joseph Schutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9016880
    Abstract: An advantageous optical apparatus with relatively large field viewing of an image to the rear of an observer is disclosed. The apparatus has two mirrors having cylindrical symmetry where the mirrors are positioned so that a plane of symmetry for each mirror is substantially coincident. The mirrors are further configured so that the apparatus has an astigmatism less than 0.0035, and a ratio between the far field and the near field magnification of less than 0.9. The apparatus is fabricated, in one embodiment, by using force to conform a thin polymer mirror onto an appropriate surface configuration on a monolithic block.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: April 28, 2015
    Inventor: Ronald Joseph Schutz
  • Publication number: 20140168803
    Abstract: An advantageous optical apparatus with relatively large field viewing of an image to the rear of an observer is disclosed. The apparatus has two mirrors having cylindrical symmetry where the mirrors are positioned so that a plane of symmetry for each mirror is substantially coincident. The mirrors are further configured so that the apparatus has an astigmatism less than 0.0035, and a ratio between the far field and the near field magnification of less than 0.9. The apparatus is fabricated, in one embodiment, by using force to conform a thin polymer mirror onto an appropriate surface configuration on a monolithic block.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Inventor: Ronald Joseph Schutz
  • Patent number: 7011574
    Abstract: A polyelectrolyte dispensing polishing pad, a process for its production and a method of polishing, e.g., chemical mechanical polishing (CMP), a substrate such as a semiconductor wafer, are provided. The pad is usable for CMP planarization of an oxide or metal layer on the wafer. The pad has a polishing layer of erodible binder material containing uniformly distributed therein both abrasive particles and a water soluble ionizable electrolyte substance such as a polyelectrolyte, such that during polishing the binder material incrementally erodes and the abrasive particles and electrolyte substance incrementally release into direct contact with the substrate. The electrolyte substance inhibits CMP removal of silicon nitride, e.g., as a stop layer, under an upper oxide or metal layer, such that the upper layer is selectively polished and the CMP stops on the stop layer leaving the latter intact.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: March 14, 2006
    Assignee: Infineon Technologies AG
    Inventors: Alexander William Simpson, Ronald Joseph Schutz
  • Patent number: 6841480
    Abstract: A polyelectrolyte dispensing polishing pad, a process for its production and a method of polishing, e.g., chemical mechanical polishing (CMP), a substrate such as a semiconductor wafer, are provided. The pad is usable for CMP planarization of an oxide or metal layer on the wafer. The pad has a polishing layer of erodible binder material containing uniformly distributed therein both abrasive particles and a water soluble ionizable electrolyte substance such as a polyelectrolyte, such that during polishing the binder material incrementally erodes and the abrasive particles and electrolyte substance incrementally release into direct contact with the substrate. The electrolyte substance inhibits CMP removal of silicon nitride, e.g., as a stop layer, under an upper oxide or metal layer, such that the upper layer is selectively polished and the CMP stops on the stop layer leaving the latter intact.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: January 11, 2005
    Assignee: Infineon Technologies AG
    Inventors: Alexander William Simpson, Ronald Joseph Schutz
  • Publication number: 20030148614
    Abstract: A polyelectrolyte dispensing polishing pad, a process for its production and a method of polishing, e.g., chemical mechanical polishing (CMP), a substrate such as a semiconductor wafer, are provided. The pad is usable for CMP planarization of an oxide or metal layer on the wafer. The pad has a polishing layer of erodible binder material containing uniformly distributed therein both abrasive particles and a water soluble ionizable electrolyte substance such as a polyelectrolyte, such that during polishing the binder material incrementally erodes and the abrasive particles and electrolyte substance incrementally release into direct contact with the substrate. The electrolyte substance inhibits CMP removal of silicon nitride, e.g., as a stop layer, under an upper oxide or metal layer, such that the upper layer is selectively polished and the CMP stops on the stop layer leaving the latter intact.
    Type: Application
    Filed: February 4, 2002
    Publication date: August 7, 2003
    Inventors: Alexander William Simpson, Ronald Joseph Schutz
  • Publication number: 20020016050
    Abstract: A method for depositing metal lines for semiconductor devices, in accordance with the present invention includes the step of providing a semiconductor wafer including a dielectric layer formed on the wafer. The dielectric layer has vias formed therein. The wafer is placed in a deposition chamber wherein the wafer has a first temperature achieved without preheating. A metal is deposited on the wafer which fills the vias wherein the metal depositing is initiated at a substantially same time as heating the wafer from the first temperature.
    Type: Application
    Filed: October 6, 1999
    Publication date: February 7, 2002
    Inventors: STEFAN J. WEBER, RONALD JOSEPH SCHUTZ, LARRY CLEVENGER, ROY IGGULDEN
  • Patent number: 6136714
    Abstract: A method for enhancing the removal rate of a metal barrier layer during CMP includes providing a semiconductor wafer having an insulator layer, a metal barrier layer formed on at least a portion of the insulation layer and a conductive layer formed thereon and contacting the semiconductor wafer with a chemical-mechanical polishing slurry containing a metal removal-enhancing amount of at least one chelating agent.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: October 24, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Ronald Joseph Schutz
  • Patent number: 5693561
    Abstract: Integrated circuit fabrication includes the formation of tungsten contacts in windows. Between the tungsten and the contact region are Ti and TiN layers. Defects are prevented or reduced by sealing grain boundaries in the TiN layer prior to tungsten deposition. Grain boundaries are sealed by rinsing the TiN layer in water at ambient temperature or above.
    Type: Grant
    Filed: May 14, 1996
    Date of Patent: December 2, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Sailesh Mansinh Merchant, Leonard Jay Olmer, Ronald Joseph Schutz