Abstract: A system and method for synchronizing a plurality of main processors. At a first time and in response to a first time reference, a first rendezvous signal is sent from a first to a second of the plurality of main processors. At a second time, and in response to a second time reference, a second rendezvous signal is sent from the second of the plurality of main processors, to the first of said plurality of main processors. After the first rendezvous signal is received by the second of the plurality of main processors and the second rendezvous signal is received by the first of said plurality of main processors, substantially simultaneous scanning of control information is initiated by the first and second of the plurality of main processors. In variations, a difference between the first and second times signals a fault condition.

Abstract: A control system for executing an application program is disclosed herein. The control system includes a plurality of main processor modules. The control system further includes a plurality of input/output modules for providing input process data to associated ones of the plurality of main processor modules. A voting system is operative to compare the input process data associated with first and second of the plurality of main processor modules to the input process data associated with a third of the main processor modules. This results in generation of voted input process data utilized by the third main processor module in executing the application program. In certain implementations the system includes a high-speed bus for distributing the voted input process data to the first and second main processor modules, each of which also executes the application program based upon the voted input process data.

Abstract: A control system for executing an application program is disclosed herein. The control system includes a plurality of main processor modules. The control system further includes a plurality of input/output modules for providing input process data to associated ones of the plurality of main processor modules. A voting system is operative to compare the input process data associated with first and second of the plurality of main processor modules to the input process data associated with a third of the main processor modules. This results in generation of voted input process data utilized by the third main processor module in executing the application program. In certain implementations the system includes a high-speed bus for distributing the voted input process data to the first and second main processor modules, each of which also executes the application program based upon the voted input process data.

Abstract: A controller for executing an application program to process control information related to control elements includes one or more main processors that each run the application program; a time synchronization system that synchronizes the time clocks of the main processors; and a voting system that exchanges information between the main processors and compares the information received from the other main processors. In addition, the controller includes one or more rendezvous signals sent to and received by the main processors as well as a mechanism for updating the time clocks based on a clocking midpoint of all processor signals.