Abstract: A composite structure for storing thermal energy. In one embodiment, an apparatus for storing thermal energy includes: a thermal storage material and a three-dimensional structure. The three-dimensional structure includes: a plurality of first truss elements defined by a plurality of first self-propagating polymer waveguides and extending along a first direction; a plurality of second truss elements defined by a plurality of second self-propagating polymer waveguides and extending along a second direction; and a plurality of third truss elements defined by a plurality of third self-propagating polymer waveguides and extending along a third direction. The first, second, and third truss elements interpenetrate each other at a plurality of nodes to form a continuous material. The first, second, and third truss elements define an open space. The thermal storage material occupies at least a portion of the open space, and the three-dimensional structure is self-supporting.

Abstract: A composite structure for storing thermal energy. In one embodiment, an apparatus for storing thermal energy includes: a thermal storage material and a three-dimensional structure. The three-dimensional structure includes: a plurality of first truss elements defined by a plurality of first self-propagating polymer waveguides and extending along a first direction; a plurality of second truss elements defined by a plurality of second self-propagating polymer waveguides and extending along a second direction; and a plurality of third truss elements defined by a plurality of third self-propagating polymer waveguides and extending along a third direction. The first, second, and third truss elements interpenetrate each other at a plurality of nodes to form a continuous material. The first, second, and third truss elements define an open space. The thermal storage material occupies at least a portion of the open space, and the three-dimensional structure is self-supporting.

Abstract: A self adjusting tiled image display system and method is provided. In operation, an image source having an array of tiled image displays projects a test image pattern. A positioning device is attached to a corresponding one of the image displays for positioning that image display. A sensor senses the test image pattern projected by the image displays and generates a sensor signal indicative of the sensed test image pattern. A processor compares the sensor signal to a proper alignment signal indicative of the image displays being properly aligned to generate a positioning signal. The processor applies the positioning signal to the positioning devices to position the image displays as a function of the positioning signal until the image displays are in the proper alignment.

Abstract: A method of operating a liquid crystal display, and a liquid crystal display constructed to operate in accordance with the method. The liquid crystal display has a plurality of display pixels, and the method comprises the steps of (a) operating a first switch (S1) for storing a charge on a storage capacitance (C1), the charge having a magnitude selected so as to cause a desired degree of polarization of a region (pixel) of liquid crystal material; (b) operating a second switch (S2) so as to conductively couple the stored charge to the region of liquid crystal material, thereby storing a charge on a capacitance (C2) that is associated with the region of liquid crystal material; and (c) operating a third switch (S3) so as to discharge the storage capacitance and the capacitance that is associated with the region of liquid crystal material.

Abstract: A microelectronic device is fabricated by furnishing a first substrate (40) having a silicon etchable layer (42), a silicon dioxide etch-stop layer (44) overlying the silicon layer (42), and a single-crystal silicon wafer (46) overlying the etch-stop layer (44), the wafer (46) having a front surface (52) not contacting the etch stop layer (44). A microelectronic circuit element (50) is formed in the single-crystal silicon wafer (46). The method further includes attaching the front surface (52) of the single-crystal silicon wafer (46) to a second substrate (58), and etching away the silicon layer (42) of the first substrate (40) down to the etch-stop layer (44). The second substrate (58) may also have a microelectronic circuit element (58') therein that can be electrically interconnected to the microelectronic circuit element (50).

Abstract: A method of providing a first and a second Silicon-on-Insulator (SOI) wafer, wherein each SOI wafer includes a silicon layer separated from a bulk silicon substrate by a layer of dielectric material, typically SiO2. Next, at least one electrical feedthrough is formed in each of the silicon layers and active and passive devices are formed in each of the thin silicon layers. Next, interconnects are formed that overlie the silicon layer and are electrically coupled to the feedthrough. One of the wafers is then attached to a temporary substrate such that the interconnects are interposed between the thin silicon layer and the temporary substrate. The bulk silicon substrate of the wafer having the temporary substrate is then etched to expose the dielectric layer. Further interconnects are then formed through the exposed dielectric layer for electrically contacting the at least one feedthrough. This results in the formation of a first circuit assembly.

Abstract: A method and apparatus for improving the operation of infrared detectors of a type generally characterized by a semiconductive substrate of a first conductivity type which includes a detection region defined or bounded by a heavily doped backside electrode and buried layer of the first conductivity type. A charge coupled device (CCD) readout structure for transfers charge in an epitaxial layer of second conductivity type which overlies the substrate, and the detector further includes a heavily doped layer of the second conductivity type positioned between the epitaxial layer and the substrate to shield the charge carriers of the substrate from the CCD voltages. Means are provided by the present invention for the injection of minority charge carriers into the epitaxial region which are subsequently transferred to output means by the CCD.

Abstract: There is disclosed an all silicon monolithic focal plane array of infrared detectors for image detection. The structure comprises two epitaxial layers grown on an extrinsically doped silicon substrate. The detectors are formed in and extend through the substrate, the material of which is sensitive to specific wavelength infrared signals according to the dopant used in the substrate. The collection of charges takes place on a first buried layer formed around a portion of the first epitaxial layer-substrate interface, and the charges are then transferred through a second buried layer of the same conductivity type to a conducting surface layer on the upper portion of the second epitaxial layer. The signal readout function is performed by a charge coupled device shift register constructed in the second epitaxial layer by providing selectively spaced electrodes in an insulating layer.

Abstract: There is disclosed an all silicon monolithic focal plane array of infrared detectors for image detection. The structure comprises an epitaxial layer grown from an extrinsicly doped silicon substrate. The detectors are formed in and extend through the substrate the material of which is sensitive to specific wavelength infrared signals according to the dopant used in the substrate. The signal readout function is performed by a charge coupled device shift register constructed in the epitaxial layer by separating electrodes from it in an insulating layer formed on it. Carriers generated in the detecor by incident infrared radiation are directly injected into the CCD shift register and detected at the output end. The monolithic construction and the use of an epitaxial layer to form the CCD shift register results in low cost, high yield and high efficiency devices.

Abstract: There is disclosed an all silicon monolithic focal plane array of infrared detectors for image detection. The structure comprises an epitaxial layer grown on an extrinsically doped silicon substrate. The detectors are formed in and extend through the substrate, the material of which is sensitive to specific wavelength infrared signals according to the dopant used in the substrate. The collection of charges takes place on a buried layer formed around a portion of the epitaxial layer-substrate interface, and the charges are then transferred through a surface layer of the same conductivity type to the surface of the epitaxial layer. The signal readout function is performed by a charge coupled device shift register constructed in the epitaxial layer by providing selectively spaced electrodes in an insulating layer.

Abstract: A device for performing Haddamard transform operations including a first matrix of interconnected electronic cells, and a second matrix of interconnected electronic cells connected to the output of the first matrix, the electronic cells being charge coupled devices. A rectangular wave generator is electronically connected to the first and second matrices. The first matrix comprises a plural number of rows of such electronic cells serially connected to each other, the output of each one of the rows being connected to an input of each one of the cells corresponding to one of the rows of the second matrix. As a result a solution of on-focal plane Haddamard transform is obtained by recording the Haddamard sequencies at a common terminal of the second or output matrix.

Abstract: There is disclosed a circuit for removing the DC or background representing charge component of a signal to be passed through a charge coupled device shift register without degrading the information carried by the AC component of the signal. Such a circuit may, for example, be used to remove the constant background illumination component of the input from a semiconductor imaging device to increase the contrast ratio of the image signal. The circuit comprises two electrode defined potential wells or buckets formed in a semiconductor substrate with a control gate between them and a transfer gate which controls the flow of the charges in the first bucket to a P-N junction. Like the well defining electrodes, the control gate and transfer gate are electrodes separated from the semiconductor substrate by an insulation layer.