Patents by Inventor Ronald Mraz

Ronald Mraz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated communications for pipelined computers
    Patent number: 5802288
    Abstract: This document describes a feature that can be added to existing pipelined architectures (such as RISC) to enhance packet based or message passing communications. The feature integrates the communication interface directly into the pipeline of the processor, offering the potential to greatly reduce latency and overhead for fine grain communications. Additionally, a second interface is provided to maintain high bandwidth for large blocks of data.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: September 1, 1998
    Assignee: International Business Machines Corporation
    Inventors: Kattamuri Ekanadham, Ronald Mraz
  • Method for fine grain adjustments to system time in computer systems
    Patent number: 5701446
    Abstract: A method for performing fine grain time adjustments in computer systems. A fine grain time adjustment can be completed in the first interrupt instead of doing it piecewise over many interrupts. If the adjustment offset is less than or equal to a threshold, then the clock is adjusted in the first clock interrupt; if the adjustment offset is greater than the threshold, then the clock is adjusted over a number of interrupts with an adjustment by an amount equal to the threshold per interrupt.
    Type: Grant
    Filed: June 9, 1995
    Date of Patent: December 23, 1997
    Assignee: International Business Machines Corporation
    Inventors: Bulent Abali, Ronald Mraz
  • IP bridge for parallel machines
    Patent number: 5544162
    Abstract: This invention is a high performance, standard IO interconnect "bridge" hardware for a parallel machine with a packet switching network in place. Combining new hardware and new software, this bridge connects parallel processors to the external world. The hardware is a "bridge" connecting an internal inter-processor switch to external asynchronous transfer node networks. The software is a "mirror" for making the connections. The invention provides high bandwidth, low latency and deterministic performance, and is inexpensive to build.
    Type: Grant
    Filed: January 10, 1995
    Date of Patent: August 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Ronald Mraz, Michael M. Tsao