Patents by Inventor Ronald N. Legge

Ronald N. Legge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6703258
    Abstract: An enhanced conductive probe that facilitates the gathering of data and a method of fabricating the probe. The probe includes an amplifier fabricated to define the probe tip. More particularly, the probe structure is defined by an amplifier formed as one of a metal oxide semiconductor (MOS) transistor, a bipolar amplifier, or a metal semiconductor field effect transistor (MESFET), thereby providing for the amplification of the input signal and improved signal to noise ratio during operation of the probe tip.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: March 9, 2004
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Kumar Shiralalgi, Ronald N. Legge
  • Patent number: 6494217
    Abstract: A laser cleaning process is disclosed for cleaning the surface of materials, such as semiconductor wafers and the like, which process can be performed at atmospheric pressure. The process includes the steps of providing a structure with a surface having undesirable contaminant particles thereon, wetting the surface with a liquid including reactive or non-reactive liquids, and irradiating the surface using photon energy with sufficient energy to remove the wetting liquid and the undesirable material.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: December 17, 2002
    Assignee: Motorola, Inc.
    Inventors: Danny L. Thompson, Mary C. Freeman, Ronald N. Legge
  • Publication number: 20020167008
    Abstract: An enhanced conductive probe that facilitates the gathering of data and a method of fabricating the probe. The probe includes an amplifier fabricated to define the probe tip. More particularly, the probe structure is defined by an amplifier formed as one of a metal oxide semiconductor (MOS) transistor, a bipolar amplifier, or a metal semiconductor field effect transistor (MESFET), thereby providing for the amplification of the input signal and improved signal to noise ratio during operation of the probe tip.
    Type: Application
    Filed: July 2, 2002
    Publication date: November 14, 2002
    Inventors: Theresa J. Hopson, Kumar Shiralalgi, Ronald N. Legge
  • Patent number: 6479892
    Abstract: An enhanced conductive probe that facilitates the gathering of data and a method of fabricating the probe. The probe includes an amplifier fabricated to define the probe tip. More particularly, the probe structure is defined by an amplifier formed as one of a metal oxide semiconductor (MOS) transistor, a bipolar amplifier, or a metal semiconductor field effect transistor (MESFET), thereby providing for the amplification of the input signal and improved signal to noise ratio during operation of the probe tip.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: November 12, 2002
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Kumar Shiralalgi, Ronald N. Legge
  • Publication number: 20010011545
    Abstract: A laser cleaning process is disclosed for cleaning the surface of materials, such as semiconductor wafers and the like, which process can be performed at atmospheric pressure. The process includes the steps of providing a structure with a surface having undesirable contaminant particles thereon, wetting the surface with a liquid including reactive or non-reactive liquids, and irradiating the surface using photon energy with sufficient energy to remove the wetting liquid and the undesirable material.
    Type: Application
    Filed: January 23, 2001
    Publication date: August 9, 2001
    Applicant: Motorola, Inc.
    Inventors: Danny L. Thompson, Mary C. Freeman, Ronald N. Legge
  • Patent number: 5975757
    Abstract: An apparatus and method for providing a topographical and thermal image of a semiconductor device. A probe (10) is made from a first ribbon of material (11) and a second ribbon of material (12) which forms a thermocouple junction (13). A probe tip (15) is then attached to the thermocouple junction (13) with an epoxy (14). In an alternate embodiment of the present invention, a probe (20) has a point region (17) which is formed by bending a portion of the thermocouple junction (13) and coating the point region (17) is coated with a thermally conductive material. An optical signal is then reflected off a planar portion of the first ribbon of material (11), the second ribbon of material (12), or the thermocouple junction (13) so the motion of the probe (10,20) can be monitored by an optical detector.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: November 2, 1999
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Ronald N. Legge
  • Patent number: 5772325
    Abstract: A probe (10) is formed to provide a topographical and thermal image of a semiconductor device. The probe (10) is made from a first ribbon of material (11) and a second ribbon of material (12) which forms a thermocouple junction (13). A probe tip (15) is then attached to the thermocouple junction (13) with an epoxy (14). In an alternate embodiment of the present invention, a probe (20) has a point region (17) which is formed by bending a portion of the thermocouple junction (13) and coating the point region (17) is coated with a thermally conductive material. An optical signal is then reflected off a planar portion of the first ribbon of material (11), the second ribbon of material (12), or the thermocouple junction (13) so the motion of the probe (10,20) can be monitored by an optical detector.
    Type: Grant
    Filed: November 20, 1995
    Date of Patent: June 30, 1998
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Ronald N. Legge
  • Patent number: 5748524
    Abstract: A multi-layer magnetic memory cell is provided, with magnetic end vectors adjacent the ends of the cell pinned in a fixed direction. To pin the magnetic end vectors, a magnetic field is applied to an end of at least one of the layers of magnetic material in the cell to move the magnetic end vectors in the magnetic material at the end of the cell into a fixed direction. Pinning material is then disposed adjacent to the end to maintain the magnetic end vectors in the magnetic material at the end of the cell in the fixed direction.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: May 5, 1998
    Assignee: Motorola, Inc.
    Inventors: Eugene Chen, Saied N. Tehrani, Ronald N. Legge, Xiaodong T. Zhu
  • Patent number: 5734606
    Abstract: New types of memory cell structures (20, 40) for a magnetic random access memory are provided. A memory cell (20, 40) has a plurality of cell pieces (21-24) where digital information is stored. Each cell piece is formed by magnetic layers (27, 28) separated by a conductor layer (29). A word line (25, 41) is placed adjacent each cell piece for winding around cell pieces (21-24) and meandering on a same plane on cell pieces (21-24), for example. The invention attains less power consumption and effective usage for a word current.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Saied N. Tehrani, Eugene Chen, Ronald N. Legge, Xiaodong T. Zhu, Mark Durlam
  • Patent number: 5725788
    Abstract: An apparatus (95) and method for patterning a surface of an article (30), the apparatus (95) including a large-area stamp (50) for forming a self-assembled monolayer (36) (SAM) of a molecular species (38) on the surface (34) of a layer (32) of resist material, which is formed on the surface of the article (30). The large-area stamp (50) includes a layer (52) of an elastomer and has, embedded within it, mechanical structures (68, 80) which stiffen the large-area stamp (50) and deform it to control the stamped patterns. The method includes the steps of: forming a layer (32) of resist material is on the surface of the article (30), utilizing the large-area stamp (50) to form the SAM (36) on the surface (34) of the layer (32) of resist material, etching the layer (32) of resist material, and thereafter etching or plating the surface of the article (30).
    Type: Grant
    Filed: March 4, 1996
    Date of Patent: March 10, 1998
    Assignee: Motorola
    Inventors: George N. Maracas, Ronald N. Legge, Herbert Goronkin, Lawrence N. Dworsky
  • Patent number: 5388323
    Abstract: A probe (10,30,40) for forming images of surfaces (11) facilitates simultaneous formation of both thermal and atomic force microsocopy images. The probe (10,30,40) includes a heat sensing assembly (15) that has a heat sensing element (19,38,42). An electrically isolating and thermally conductive tip (22,48) projects from the heat sensing assembly. The probe (10) also has a reflective element (24) that is positioned between a first end of the heat sensing assembly (15) and the electrically isolating and thermally conductive tip (22).
    Type: Grant
    Filed: June 21, 1994
    Date of Patent: February 14, 1995
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Ronald N. Legge, Juan P. Carrejo
  • Patent number: 5356218
    Abstract: A probe (10,30,40) for forming images of surfaces (11) facilitates simultaneous formation of both thermal and atomic force microsocopy images. The probe (10,30,40) includes a heat sensing assembly (15) that has a heat sensing element (19,38,42). An electrically isolating and thermally conductive tip (22,48) projects from the heat sensing assembly. The probe (10) also has a reflective element (24) that is positioned between a first end of the heat sensing assembly (15) and the electrically isolating and thermally conductive tip (22).
    Type: Grant
    Filed: May 4, 1993
    Date of Patent: October 18, 1994
    Assignee: Motorola, Inc.
    Inventors: Theresa J. Hopson, Ronald N. Legge, Juan P. Carrejo
  • Patent number: 5334855
    Abstract: A light emitting diode including a carrier injection layer of semiconductor material, such as diamond, and a light emitting layer of polycrystalline phosphor, such as zinc oxide, positioned to form a diode junction therebetween. The semiconductor material being selected to have a wider bandgap than the polycrystalline phosphor and the materials being further selected to minimize the discontinuities at the junction which would cause energy spikes.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: August 2, 1994
    Assignee: Motorola, Inc.
    Inventors: Curtis D. Moyer, James E. Jaskie, Ronald N. Legge
  • Patent number: 4956314
    Abstract: A method for differentially etching silicon nitride, preferably formed in a hydrogen free environment, wherein hydrogen is implanted into various regions of the silicon nitride. The silicon nitride may then be etched by a number of different etchants, some of which will etch the implanted regions appreciably faster and others which will etch the non-implanted regions more quickly. This method is especially useful in the fabrication of self-aligned gate devices.
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: September 11, 1990
    Assignee: Motorola, Inc.
    Inventors: Gordon Tam, Ronald N. Legge, Wayne M. Paulson
  • Patent number: 4706870
    Abstract: A process is disclosed for applying an electrical contact to the surface of a semiconductor device. A layer of metal selected from metals such as nickel, silver, copper, or alloys of these metals contacts a selected surface region of the device. A metallic contact is then soldered or otherwise joined to the layer of metal. To facilitate the joining, any native oxide present on the surface of the metal layer is first reduced by the low energy implantation of hydrogen ions into the metal surface.
    Type: Grant
    Filed: October 23, 1986
    Date of Patent: November 17, 1987
    Assignee: Motorola Inc.
    Inventor: Ronald N. Legge
  • Patent number: 4602980
    Abstract: A method is disclosed for improving the crystallinity of semiconductor ribbon material while increasing the material throughput and decreasing energy requirements. The crystallinity of a ribbon of semiconductor material can be improved by forming a localized molten zone in the material and sweeping this molten zone along the length of the material. As the molten zone refreezes, the material is locally recrystallized with enhanced grain size. In accordance with the invention, two ribbons are positioned back-to-back with a slight spacing between the ribbons. Energy sources are focused on the outer surfaces of the two ribbons to create a molten zone in each of the ribbons. Because of the close proximity between the ribbons, much of the energy reradiated from each molten zone is absorbed by the adjacent ribbon. The molten zones are then swept along both of the ribbons to simultaneously cause crystal improvement in both ribbons.
    Type: Grant
    Filed: October 1, 1984
    Date of Patent: July 29, 1986
    Assignee: Solavolt International
    Inventors: Ralph J. Ellis, Ronald N. Legge, Israel A. Lesk
  • Patent number: 4592129
    Abstract: A process is disclosed for fabricating an improved antireflection coating on a substrate. A layer of dielectric material having a first thickness and a first index of refraction are formed overlying a substrate. The dielectric material is implanted with hydrogen to form an implanted surface region having a thickness less than the thickness of the entire layer of dielectric material. The hydrogen reduces the index of refraction of the implanted region to a value less than the index of refraction of the initial layer. The structure overlying the substrate thus includes two integral layers having different indices of refraction with the lower index of refraction, as desired, at the surface of the dielectric material. The process can be extended by further implantation to provide an increased number of distinct layers of differing index or to provide a continuum of regions of varying index of refraction.
    Type: Grant
    Filed: April 1, 1985
    Date of Patent: June 3, 1986
    Assignee: Motorola, Inc.
    Inventor: Ronald N. Legge
  • Patent number: 4547256
    Abstract: Apparatus and method are provided for thermally treating a semiconductor substrate. According to the method, the substrate is isothermally heated to an elevated temperature near the thermal treatment temperature and then is further heated to a higher temperature at which the thermal treatment occurs. Following the thermal treatment the substrate is isothermally cooled to a sufficiently low temperature to avoid thermally induced defects.
    Type: Grant
    Filed: December 20, 1982
    Date of Patent: October 15, 1985
    Assignee: Motorola, Inc.
    Inventors: Richard W. Gurtler, Ronald N. Legge, Israel A. Lesk
  • Patent number: 4382099
    Abstract: A method is provided for predepositing dopant material on semiconductor substrates. The semiconductor substrates are positioned within a high pressure plasma reactor apparatus. A high pressure rf plasma is generated in the apparatus at a pressure of about one atmosphere or greater. Dopant materials such as B.sub.2 H.sub.6, PH.sub.3, or AsH.sub.3 are introduced to the plasma and form ionized species of the dopant. The plasma and the ionized species are directed to the surface of the semiconductor substrates whereon a uniform layer of the dopant is deposited.
    Type: Grant
    Filed: October 26, 1981
    Date of Patent: May 3, 1983
    Assignee: Motorola, Inc.
    Inventors: Ronald N. Legge, Kalluri R. Sarma
  • Patent number: 4370288
    Abstract: A process is provided for forming a self-supporting semiconductor film or ribbon. A TESS substrate is prepared from a substrate of refractory material having an expansion coefficient different from the expansion coefficient of the semiconductor material. A colloidal suspension of graphite is applied to the substrate to form a thin layer of loosely adherent graphite particles. Over this layer of graphite is deposited a layer of the semiconductor material, the deposition occurring at an elevated temperature. Upon cooling from the deposition temperature, the differential thermal expansion coefficience causes the shearing at the graphite layer and therefore provides for the easy removal of the semiconductor layer from the substrate.
    Type: Grant
    Filed: November 18, 1980
    Date of Patent: January 25, 1983
    Assignee: Motorola, Inc.
    Inventors: M. John Rice, Jr., Ronald N. Legge