Patents by Inventor Ronald Nicholson

Ronald Nicholson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8629006
    Abstract: The present invention provides architectures for hybrid integrated circuits and methods for producing these hybrid integrated circuits that contain both field programmable gate arrays and mask programmable gate arrays, a form of application specific integrated circuits. Methods for producing an integrated circuit that is field programmable as well as mask programmable include the steps of: designing wafer bank layers and finishing layers, where the wafer bank layers provide a plurality of selectable functional blocks; fabricating said wafer bank layers; designing mask programmed interconnect layers for said integrated circuit, where the interconnect layers interconnect selected ones of the plurality of functional blocks from the wafer bank layers; fabricating the interconnect layers on the wafer bank layers; and fabricating the finishing layers on the interconnect layers to produce the integrated circuit.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: January 14, 2014
    Assignee: Agate Logic, Inc.
    Inventors: Steven Winegarden, Ronald Nicholson, John Jun Yu
  • Publication number: 20080164329
    Abstract: An apparatus that monitors the voter's actions while he or she votes, with tests for applied pressure, rapid and deliberate motion, and range of motion, within a limited time frame and designated area, to thereby generate electronic data directly and simultaneously from the voter's hand motion and thus accurately determine the voter's intent.
    Type: Application
    Filed: January 4, 2008
    Publication date: July 10, 2008
    Inventors: Victor Piorun, Merwyn Walther, Ronald Nicholson
  • Publication number: 20080132007
    Abstract: The present invention provides architectures for hybrid integrated circuits and methods for producing these hybrid integrated circuits that contain both field programmable gate arrays and mask programmable gate arrays, a form of application specific integrated circuits. Methods for producing an integrated circuit that is field programmable as well as mask programmable include the steps of: designing wafer bank layers and finishing layers, where the wafer bank layers provide a plurality of selectable functional blocks; fabricating said wafer bank layers; designing mask programmed interconnect layers for said integrated circuit, where the interconnect layers interconnect selected ones of the plurality of functional blocks from the wafer bank layers; fabricating the interconnect layers on the wafer bank layers; and fabricating the finishing layers on the interconnect layers to produce the integrated circuit.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventors: Steven Winegarden, Ronald Nicholson, John Jun Yu
  • Publication number: 20040039633
    Abstract: A discount, special value, or “cents-off” advertising or promotion coupon that is generic in nature so as to permit its use with a number of disparate offerings, at the discretion of the customer or end-user; and a means for promotion, distribution, redemption and utilization of such coupons.
    Type: Application
    Filed: August 22, 2002
    Publication date: February 26, 2004
    Inventor: Ronald Nicholson
  • Patent number: 6275239
    Abstract: A media coprocessor for performing 3-D graphics, video, and audio functions. The media coprocessor is comprised of a single IC semiconductor chip which is coupled with a host processor chip, one or more memory chips, and an I/O controller chip. The media coprocessor includes a digital bitstream processor, a digital signal processor, and a display processor. An update interval, synchronized to a video frame, is defined. This update interval is divided into a number of partitions. Audio data is processed during one of the partitions. Video data is processed during another partition. And 3-D graphics is processed in another partition. Thereby, the processing is performed in a sequential, time-division multiplex scheme whereby the single media coprocessor chip processes all three partitions in a single video frame.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: August 14, 2001
    Assignee: Silicon Graphics, Inc.
    Inventors: Gulbin Ezer, Sudhaker Rao, Timothy J. van Hook, Ronald Nicholson