Abstract: Systems and methods for streaming data. Systems allow read/write across multiple or N device modules. Device modules on a bus ring configure at power up (during initialization process); this process informs each device module of its associated address values. Each ringed device module analyzes an address indicator word, which identifies an address at which a read/write operation is intended for, and compares the address designated by the address indicator word to its assigned addresses; when the address designated by the address indicator word is an address associated with the device module, the device module read/writes from/to the address designated by the address indicator word. Memory controller (ring controller or master bus) is not required to ‘know’ which memory chip/device module in a daisy chain the address command word is intended for. Therefore, system embodiments allow streaming without consideration of a number of memory chips/device modules on bus.

Abstract: Systems and methods for streaming data. Systems allow read/write across multiple or N device modules. Device modules on a bus ring configure at power up (during initialization process); this process informs each device module of its associated address values. Each ringed device module analyzes an address indicator word, which identifies an address at which a read/write operation is intended for, and compares the address designated by the address indicator word to its assigned addresses; when the address designated by the address indicator word is an address associated with the device module, the device module read/writes from/to the address designated by the address indicator word. Memory controller (ring controller or master bus) is not required to ‘know’ which memory chip/device module in a daisy chain the address command word is intended for. Therefore, system embodiments allow streaming without consideration of a number of memory chips/device modules on bus.

Abstract: Systems and methods for streaming data. Systems allow read/write across multiple or N device modules. Device modules on a bus ring configure at power up (during initialization process); this process informs each device module of its associated address values. Each ringed device module analyzes an address indicator word, which identifies an address at which a read/write operation is intended for, and compares the address designated by the address indicator word to its assigned addresses; when the address designated by the address indicator word is an address associated with the device module, the device module read/writes from/to the address designated by the address indicator word. Memory controller (ring controller or master bus) is not required to ‘know’ which memory chip/device module in a daisy chain the address command word is intended for. Therefore, system embodiments allow streaming without consideration of a number of memory chips/device modules on bus.

Abstract: A method and electronics circuit for processing very high resolution images or very high frame rate images in real time. Each pixel within a frame of pixels is compared to the neighboring pixels within the frame to determine if the pixel is part of a blob group. If the pixel is part of the blob group, the characteristics of the pixel are added to the statistics for the blob group. When a pixel overlaps two target blob groups, the two blob groups are combined to form one blob group. When the end of the frame is reached information about the blob groups in the frame is made available.

Abstract: A method and electronics circuit for processing very high resolution images or very high frame rate images in real time. Each pixel within a frame of pixels is compared to the neighboring pixels within the frame to determine if the pixel is part of a blob group. If the pixel is part of the blob group, the characteristics of the pixel are added to the statistics for the blob group. When a pixel overlaps two target blob groups, the two blob groups are combined to form one blob group. When the end of the frame is reached information about the blob groups in the frame is made available.

Abstract: An apparatus and method for use in transmitting data that is supplied with a high jitter input clock in a serial data stream over a single fiber cable. Video data from a camera is stored in memory using the high jitter clock. A stable clock is used to transmit the data from memory. To account for drift between the input clock and the stable clock idle words are added to or deleted from the transmitted data.

Abstract: A method and electronics circuit for processing very high resolution images or very high frame rate images in real time. Each pixel within a frame of pixels is compared to the neighboring pixels within the frame to determine if the pixel is part of a blob group. If the pixel is part of the blob group, the characteristics of the pixel are added to the statistics for the blob group. When a pixel overlaps two target blob groups, the two blob groups are combined to form one blob group. When the end of the frame is reached information about the blob groups in the frame is made available.

Abstract: A method and electronics circuit for processing very high resolution images or very high frame rate images in real time. Each pixel within a frame of pixels is compared to the neighboring pixels within the frame to determine if the pixel is part of a blob group. If the pixel is part of the blob group, the characteristics of the pixel are added to the statistics for the blob group. When a pixel overlaps two target blob groups, the two blob groups are combined to form one blob group. When the end of the frame is reached information about the blob groups in the frame is made available.

Abstract: An apparatus and method for use in transmitting data that is supplied with a high jitter input clock in a serial data stream over a single fiber cable. Video data from a camera is stored in memory using the high jitter clock. A stable clock is used to transmit the data from memory. To account for drift between the input clock and the stable clock idle words are added to or deleted from the transmitted data.