Abstract: A control system comprises an active dead band, coupled to a feedback path of the control system, configured to receive a first signal derived from a motor position signal of the feedback path of the control system and a utilize, in accordance with the signal, a set of thresholds to prevent feedback noise within a driveline of the control system.

Abstract: A control system comprises an active dead band, coupled to a feedback path of the control system, configured to receive a first signal derived from a motor position signal of the feedback path of the control system and a utilize, in accordance with the signal, a set of thresholds to prevent feedback noise within a driveline of the control system.

Abstract: A system for controlling an electromechanical device includes a motor drive, a main controller, a voltage regulator and a resistor-capacitor circuit. The motor drive controls an electric motor of the electromechanical device. The main controller provides motor commands to control the motor drive that are provided by providing command voltage on at least one command line. The voltage regulator circuit receives the command voltage and provides a motor voltage to power the motor drive. A capacitor of the resistor-capacitor circuit is charged by the command voltage, and the motor voltage is controlled based upon charge of the capacitor.

Abstract: A system for controlling an electromechanical device includes a motor drive, a main controller, a voltage regulator and a resistor-capacitor circuit. The motor drive controls an electric motor of the electromechanical device. The main controller provides motor commands to control the motor drive that are provided by providing command voltage on at least one command line. The voltage regulator circuit receives the command voltage and provides a motor voltage to power the motor drive. A capacitor of the resistor-capacitor circuit is charged by the command voltage, and the motor voltage is controlled based upon charge of the capacitor.

Abstract: A power generation/distribution system includes a RAM air turbine (RAT) generator and an emergency integrated control center (EICC) that selectively applies either primary power provided by a primary power source or emergency power developed by the RAT generator to an alternating current essential bus (AC ESS bus) for distribution to one or more essential loads. The EICC monitors the primary power and in response to a loss of primary power selectively disables the supply of power from the AC ESS bus to the essential loads and manages subsequent loading of the RAT generator by the essential loads.

Abstract: A power generation/distribution system includes a RAM air turbine (RAT) generator and an emergency integrated control center (EICC) that selectively applies either primary power provided by a primary power source or emergency power developed by the RAT generator to an alternating current essential bus (AC ESS bus) for distribution to one or more essential loads. The EICC monitors the primary power and in response to a loss of primary power selectively disables the supply of power from the AC ESS bus to the essential loads and manages subsequent loading of the RAT generator by the essential loads.

Abstract: A resolver interface includes separate anti-aliasing filters for sine and cosine signals. The separately filtered signals are then time share multiplexed to a single analog to digital (A/D) converter. Because all of the inputs are fed through the same A/D converter, any error, difference or shift caused by the A/D converter is shared across al of the inputs. A Field Programmable Gate Array (FPGA) and processor are used to digitally filter, demodulate and compute position.

Abstract: A resolver interface includes separate anti-aliasing filters for sine and cosine signals. The separately filtered signals are then time share multiplexed to a single analog to digital (A/D) converter. Because all of the inputs are fed through the same A/D converter, any error, difference or shift caused by the A/D converter is shared across al of the inputs. A Field Programmable Gate Array (FPGA) and processor are used to digitally filter, demodulate and compute position.