Patents by Inventor Ronald Peiffer

Ronald Peiffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060139017
    Abstract: An electronic interface circuit. The electronic interface circuit includes a stimulus circuit which further includes a first voltage source, a driver circuit having first and second driver outputs, a first switch having first-switch input, first-switch output, and first-switch control input, a first filter having first-filter input and first-filter output, a second switch having second-switch input, second-switch output, and second-switch control input, and a second filter having second-filter input and second-filter output. The output of the first voltage source is connected to the first-switch input; the first driver output is connected to the first-switch control input; the first-switch output is connected to the first-filter input; the second-switch input is connected to a reference potential; the second driver output is connected to the second-switch control input; the second-switch output is connected to the second-filter input; and the first-filter output is connected to the second-filter output.
    Type: Application
    Filed: December 28, 2004
    Publication date: June 29, 2006
    Inventors: Ronald Peiffer, Robert McAuliffe
  • Publication number: 20060139087
    Abstract: An electronic discharge circuit. The discharge circuit includes a first current source having first current source input and output and a current control circuit having first, second, third, and fourth control contacts. An electronic circuit element of an electronic circuit has first and second element contacts. If first control contact and first current source input are electrically connected, second control contact and first current source output are electrically connected, third control contact and first element contact are electrically connected, and fourth control contact and second element contact are electrically connected, and if the electronic circuit element is electronically charged, current discharging the electronic circuit element is limited to the current from the first current source, otherwise when so connected, current discharging the electronic circuit element is zero and current from the first current source flows into the second control contact and out the first control contact.
    Type: Application
    Filed: December 28, 2004
    Publication date: June 29, 2006
    Inventors: Ronald Peiffer, Kevin Wible
  • Publication number: 20060139824
    Abstract: In one embodiment, voltages are discharged from a circuit under test by, after pins of a circuit tester have been coupled to nodes of the circuit under test, making a first one of the pins an active pin and executing a current discharge process for the active pin. The current discharge process couples a current discharge circuit to the active pin, and then enables the current discharge circuit. A voltage of the active pin is then measured and, if the measured voltage is within a defined window, the active pin is coupled to ground. However, if the measured voltage is outside of the defined window after the current discharge circuit has been enabled for a predetermined period of time, the active pin is marked as not discharged. The current discharged circuit is then disabled and decoupled from the active pin. Thereafter, a next one of the pins is made the active pin, and the current discharged process is caused to be repeated.
    Type: Application
    Filed: September 23, 2005
    Publication date: June 29, 2006
    Inventors: Dayton Norrgard, Ronald Peiffer, Kevin Wible
  • Publication number: 20060076959
    Abstract: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.
    Type: Application
    Filed: November 28, 2005
    Publication date: April 13, 2006
    Inventors: Curtis Tesdahl, Ronald Peiffer
  • Publication number: 20060076960
    Abstract: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.
    Type: Application
    Filed: November 28, 2005
    Publication date: April 13, 2006
    Inventors: Curtis Tesdahl, Ronald Peiffer
  • Publication number: 20050068051
    Abstract: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.
    Type: Application
    Filed: September 27, 2003
    Publication date: March 31, 2005
    Inventors: Curtis Tesdahl, Ronald Peiffer
  • Publication number: 20050061540
    Abstract: A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. In an x-, y-, z-coordinate system where traces are printed along an x-y plane, the z-dimension is used to implement test access point structures. Each test access point structure is conductively connected to a trace at a test access point directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device.
    Type: Application
    Filed: September 24, 2003
    Publication date: March 24, 2005
    Inventors: Kenneth Parker, Ronald Peiffer, Glen Leinbach