Patents by Inventor Ronald Robert Uttecht

Ronald Robert Uttecht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Insulator for integrated circuits and process
    Patent number: 6559046
    Abstract: An insulator for covering an interconnection wiring level in a surface thereof on a semiconductor substrate containing semiconductor devices formed by curing a flowable oxide layer and annealing. The annealing is carried out in the presence of hydrogen and aluminum to obtain a dielectric constant of the oxide layer to a value below 3.2. Also provided is electrical insulation between neighboring devices using the flowable oxide which is cured and annealed. In this case, the annealing can be carried out in hydrogen with or without the presence of aluminum.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: May 6, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephan Alan Cohen, Vincent James McGahay, Ronald Robert Uttecht
  • Integrated pad and fuse structure for planar copper metallurgy
    Patent number: 5795819
    Abstract: A semiconductor interconnection consists of a corrosion resistant integrated fuse and Controlled, Collapse Chip Connection (C4) structure for the planar copper Back End of Line (BEOL). Non copper fuse material is directly connected to copper wiring.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: August 18, 1998
    Assignee: International Business Machines Corporation
    Inventors: William Thomas Motsiff, Robert Michael Geffken, Ronald Robert Uttecht
  • Integrated pad and fuse structure for planar copper metallurgy
    Patent number: 5731624
    Abstract: A semiconductor interconnection consists of a corrosion resistant integrated fuse and Controlled, Collapse Chip Connection (C4) structure for the planar copper Back End of Line (BEOL). Non copper fuse material is directly connected to copper wiring.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: March 24, 1998
    Assignee: International Business Machines Corporation
    Inventors: William Thomas Motsiff, Robert Michael Geffken, Ronald Robert Uttecht
  • Array protection devices and method
    Patent number: 5723898
    Abstract: The present disclosure sets forth an improved integrated circuit in which circuit elements, adjacent to a fuse, are protected by barriers positioned adjacent the fuse. In the improved integrated circuit the barriers are non-frangible, high melting point structures buried in the passivating layer, covering a wiring layer containing a fuse, and are between the fuse and adjacent circuit elements in the wiring layer structures. Also taught is a method of protecting circuit elements adjacent a fuse comprising the steps of depositing an insulating layer on the surface of a semiconductor device having active regions therein, forming a plurality of fuses and circuit elements in said layer, coating said fuses and elements with a second insulating layer, patterning said second insulating layer to form grooves between each of said fuses and any adjacent fuse or circuit element, and depositing a high melting point and non-frangible material in said grooves.
    Type: Grant
    Filed: October 4, 1996
    Date of Patent: March 3, 1998
    Assignee: International Business Machines Corp.
    Inventors: Richard Alfred Gilmour, Thomas John Hartswick, David Charles Thomas, Ronald Robert Uttecht, Erick Gregory Walton