Abstract: In some embodiments, an automatic litter and waste separator device may include a litter container which may have a base and one or more sidewalls. The base and sidewalls may form a cavity which may contain a volume of litter media and the like. A litter motivator may be coupled to the litter container and the litter motivator may be configured to vibrate or otherwise motivate the contents of the cavity. Optionally, a horizontal dampener may be coupled to the litter container and the horizontal dampener may vibrationally isolate and separate the litter container and the litter motivator above a floor surface. Optionally, a vertical dampener may be coupled to the litter container and the vertical dampener may vibrationally isolate and separate the litter container and the litter motivator above a floor surface.

Abstract: A semiconductor device (40, 50, 70) is electrically connected to a circuit board (30) through use of one or more connectors (10, 20, 90). Connector (10) includes locking pins (14) which fit through alignment holes (34) of the circuit board and which are either mechanically deformed to lock the pins in the holes, or which are received by locking holes (24, 94) of a complementary connector (20, 90). An interposer (60, 80) is used as a compliant member to assure that adequate electrical connection is made between the external terminals (42, 72) of the semiconductor device without damaging the device or the circuit board. Connector (10) includes a cavity (12) which is dimensioned to accommodate the semiconductor device while assuring proper alignment between the locking pins, the external terminals, and the circuit board.

Abstract: An unbalanced bistable, memory cell operable as a read/write and read only memory having a first switch for disconnecting the cell from a power supply and a second switch for interconnecting the information storage nodes in response to a power down signal to discharge the nodes and allow the memory cell to store a preselected bit of information determined by the unbalance after reconnection of the power supply and disconnection of the nodes upon the absence of the power down signal.